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Commit 832e9bf4 authored by Dinesh K Garg's avatar Dinesh K Garg
Browse files

ARM: dts: msm: Remove ICE specific configurations for msm8996 



ICE driver is managing its clocks/regulators now and exposing an
API for callers to use. Until now, QSEECom driver was managing
ICE clocks whenever it needs to initiate a request to configure
ICE keys. Since now there is no need to manage clocks/regulator
from qseecom, removing it from qseecom node.

Change-Id: I8dc9fce468dd0d1c64af9e8a6e6bb5bb13179d72
Signed-off-by: default avatarDinesh K Garg <dineshg@codeaurora.org>
parent 2863070d

arch/arm/boot/dts/qcom/msm8996.dtsi

+2 −15
Original line number Diff line number Diff line
@@ -2607,25 +2607,12 @@ 
				<55 512 120000 1200000>,

				<55 512 393600 3936000>;

		clock-names = "core_clk_src", "core_clk",

				"iface_clk", "bus_clk",

				"ufs_core_clk_src", "ufs_core_clk",

				"ufs_bus_clk", "ufs_iface_clk",

				"sdcc_core_clk_src", "sdcc_core_clk",

				"sdcc_bus_clk", "sdcc_iface_clk";

				"iface_clk", "bus_clk";

		clocks = <&clock_gcc clk_ce1_clk>,

			 <&clock_gcc clk_qseecom_ce1_clk>,

			 <&clock_gcc clk_gcc_ce1_ahb_m_clk>,

			 <&clock_gcc clk_gcc_ce1_axi_m_clk>,

			 <&clock_gcc clk_ufs_ice_core_clk_src>,

			 <&clock_gcc clk_gcc_ufs_ice_core_clk>,

			 <&clock_gcc clk_gcc_sys_noc_ufs_axi_clk>,

			 <&clock_gcc clk_gcc_ufs_ahb_clk>,

			 <&clock_gcc clk_sdcc1_ice_core_clk_src>,

			 <&clock_gcc clk_gcc_sdcc1_ice_core_clk>,

			 <&clock_gcc clk_gcc_sdcc1_ahb_clk>,

			 <&clock_gcc clk_gcc_sdcc1_apps_clk>;

			 <&clock_gcc clk_gcc_ce1_axi_m_clk>;

		qcom,ce-opp-freq = <171430000>;

		vdd-hba-supply = <&gdsc_ufs>;

	};



	qcom,sensor-information {