Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 82ec02fb authored Jan 04, 2017 by Gustavo Solaira

ARM: dts: msm: Re-route SEC_I2S pins on mdmcalifornium CCARD boards



The mdmcalifornium CCARD boards use the alternate pins for secondary
I2S (GPIOs 20-23). Modify the pinctrl mapping to reflect it.

Change-Id: Ifc524c948384c14957869ec17fd4f145dc7e8929
Signed-off-by: Gustavo Solaira <gustavos@codeaurora.org>

parent 6596ab38

arch/arm/boot/dts/qcom/mdmcalifornium-ccard.dtsi

+116 −0

Original line number	Diff line number	Diff line
		@@ -182,6 +182,122 @@
		bias-disable;
		};
		};

		pmx_sec_mi2s_dout {
		sec_mi2s_ws_sleep {
		mux {
		pins = "gpio20";
		function = "gpio";
		};

		config {
		pins = "gpio20";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_sck_sleep {
		mux {
		pins = "gpio23";
		function = "gpio";
		};

		config {
		pins = "gpio23";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_dout_sleep {
		mux {
		pins = "gpio22";
		function = "gpio";
		};

		config {
		pins = "gpio22";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_ws_active {
		mux {
		pins = "gpio20";
		function = "sec_mi2s_ws_b";
		};

		config {
		pins = "gpio20";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL*/
		output-high;
		};
		};

		sec_mi2s_sck_active {
		mux {
		pins = "gpio23";
		function = "sec_mi2s_sck_b";
		};

		config {
		pins = "gpio23";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL*/
		output-high;
		};
		};

		sec_mi2s_dout_active {
		mux {
		pins = "gpio22";
		function = "sec_mi2s_data1_b";
		};

		config {
		pins = "gpio22";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL*/
		output-high;
		};
		};
		};

		pmx_sec_mi2s_din {
		sec_mi2s_din_sleep {
		mux {
		pins = "gpio21";
		function = "gpio";
		};

		config {
		pins = "gpio21";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_din_active {
		mux {
		pins = "gpio21";
		function = "sec_mi2s_data0_b";
		};

		config {
		pins = "gpio21";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};
		};

		&cnss_pcie {