Commit 82c236bc authored Nov 23, 2014 by Sonny Rao Committed by Greg Kroah-Hartman Jan 08, 2015

clocksource: arch_timer: Fix code to use physical timers when requested



commit 0b46b8a718c6e90910a1b1b0fe797be3c167e186 upstream.

This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false.  It restores the
arch_counter_get_cntpct() function after removal in

0d651e4e "clocksource: arch_timer: use virtual counters"

We need this on certain ARMv7 systems which are architected like this:

* The firmware doesn't know and doesn't care about hypervisor mode and
  we don't want to add the complexity of hypervisor there.

* The firmware isn't involved in SMP bringup or resume.

* The ARCH timer come up with an uninitialized offset between the
  virtual and physical counters.  Each core gets a different random
  offset.

* The device boots in "Secure SVC" mode.

* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
  CNTHCTL.PL1PCTEN (both default to 1 at reset)

One example of such as system is RK3288 where it is much simpler to
use the physical counter since there's nobody managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.

Fixes: 0d651e4e ("clocksource: arch_timer: use virtual counters")
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 0fb5df0d

arch/arm/include/asm/arch_timer.h

+9 −0

Original line number	Diff line number	Diff line
		@@ -78,6 +78,15 @@ static inline u32 arch_timer_get_cntfrq(void)
		return val;
		}

		static inline u64 arch_counter_get_cntpct(void)
		{
		u64 cval;

		isb();
		asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
		return cval;
		}

		static inline u64 arch_counter_get_cntvct(void)
		{
		u64 cval;

arch/arm64/include/asm/arch_timer.h

+9 −0

Original line number	Diff line number	Diff line
		@@ -104,6 +104,15 @@ static inline void arch_timer_set_cntkctl(u32 cntkctl)
		asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
		}

		static inline u64 arch_counter_get_cntpct(void)
		{
		/*
		* AArch64 kernel and user space mandate the use of CNTVCT.
		*/
		BUG();
		return 0;
		}

		static inline u64 arch_counter_get_cntvct(void)
		{
		u64 cval;

drivers/clocksource/arm_arch_timer.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -462,7 +462,10 @@ static void __init arch_counter_register(unsigned type)

		/* Register the CP15 based counter if we have one */
		if (type & ARCH_CP15_TIMER) {
		if (arch_timer_use_virtual)
		arch_timer_read_counter = arch_counter_get_cntvct;
		else
		arch_timer_read_counter = arch_counter_get_cntpct;
		} else {
		arch_timer_read_counter = arch_counter_get_cntvct_mem;