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Commit 82ba6122 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Sekhar Nori
Browse files

ARM: davinci: Remove eDMA3 queue_tc_mapping data from edma_soc_info 



It is ignored by the edma driver since we are just setting back the default
mapping of TC -> Queue.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent c3dd3389

arch/arm/mach-davinci/devices-da8xx.c

+0 −16
Original line number Original line Diff line number Diff line
@@ -134,13 +134,6 @@ struct platform_device da8xx_serial_device[] = { 
	}

	}

};

};





static s8 da8xx_queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{-1, -1}

};



static s8 da8xx_queue_priority_mapping[][2] = {

static s8 da8xx_queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */

	{0, 3},

	{0, 3},
@@ -148,12 +141,6 @@ static s8 da8xx_queue_priority_mapping[][2] = { 
	{-1, -1}

	{-1, -1}

};

};





static s8 da850_queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{-1, -1}

};



static s8 da850_queue_priority_mapping[][2] = {

static s8 da850_queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */

	{0, 3},

	{0, 3},
@@ -166,7 +153,6 @@ static struct edma_soc_info da830_edma_cc0_info = { 
	.n_slot			= 128,

	.n_slot			= 128,

	.n_tc			= 2,

	.n_tc			= 2,

	.n_cc			= 1,

	.n_cc			= 1,

	.queue_tc_mapping	= da8xx_queue_tc_mapping,

	.queue_priority_mapping	= da8xx_queue_priority_mapping,

	.queue_priority_mapping	= da8xx_queue_priority_mapping,

	.default_queue		= EVENTQ_1,

	.default_queue		= EVENTQ_1,

};

};
@@ -182,7 +168,6 @@ static struct edma_soc_info da850_edma_cc_info[] = { 
		.n_slot			= 128,

		.n_slot			= 128,

		.n_tc			= 2,

		.n_tc			= 2,

		.n_cc			= 1,

		.n_cc			= 1,

		.queue_tc_mapping	= da8xx_queue_tc_mapping,

		.queue_priority_mapping	= da8xx_queue_priority_mapping,

		.queue_priority_mapping	= da8xx_queue_priority_mapping,

		.default_queue		= EVENTQ_1,

		.default_queue		= EVENTQ_1,

	},

	},
@@ -192,7 +177,6 @@ static struct edma_soc_info da850_edma_cc_info[] = { 
		.n_slot			= 128,

		.n_slot			= 128,

		.n_tc			= 1,

		.n_tc			= 1,

		.n_cc			= 1,

		.n_cc			= 1,

		.queue_tc_mapping	= da850_queue_tc_mapping,

		.queue_priority_mapping	= da850_queue_priority_mapping,

		.queue_priority_mapping	= da850_queue_priority_mapping,

		.default_queue		= EVENTQ_0,

		.default_queue		= EVENTQ_0,

	},

	},

arch/arm/mach-davinci/dm355.c

+0 −9
Original line number Original line Diff line number Diff line
@@ -568,14 +568,6 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { 




/*----------------------------------------------------------------------*/

/*----------------------------------------------------------------------*/





static s8

queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{-1, -1},

};



static s8

static s8

queue_priority_mapping[][2] = {

queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */
@@ -590,7 +582,6 @@ static struct edma_soc_info edma_cc0_info = { 
	.n_slot			= 128,

	.n_slot			= 128,

	.n_tc			= 2,

	.n_tc			= 2,

	.n_cc			= 1,

	.n_cc			= 1,

	.queue_tc_mapping	= queue_tc_mapping,

	.queue_priority_mapping	= queue_priority_mapping,

	.queue_priority_mapping	= queue_priority_mapping,

	.default_queue		= EVENTQ_1,

	.default_queue		= EVENTQ_1,

};

};

arch/arm/mach-davinci/dm365.c

+0 −11
Original line number Original line Diff line number Diff line
@@ -852,16 +852,6 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { 
};

};





/* Four Transfer Controllers on DM365 */

/* Four Transfer Controllers on DM365 */

static s8

dm365_queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{2, 2},

	{3, 3},

	{-1, -1},

};



static s8

static s8

dm365_queue_priority_mapping[][2] = {

dm365_queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */
@@ -878,7 +868,6 @@ static struct edma_soc_info edma_cc0_info = { 
	.n_slot			= 256,

	.n_slot			= 256,

	.n_tc			= 4,

	.n_tc			= 4,

	.n_cc			= 1,

	.n_cc			= 1,

	.queue_tc_mapping	= dm365_queue_tc_mapping,

	.queue_priority_mapping	= dm365_queue_priority_mapping,

	.queue_priority_mapping	= dm365_queue_priority_mapping,

	.default_queue		= EVENTQ_3,

	.default_queue		= EVENTQ_3,

};

};

arch/arm/mach-davinci/dm644x.c

+0 −9
Original line number Original line Diff line number Diff line
@@ -498,14 +498,6 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = { 




/*----------------------------------------------------------------------*/

/*----------------------------------------------------------------------*/





static s8

queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{-1, -1},

};



static s8

static s8

queue_priority_mapping[][2] = {

queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */
@@ -520,7 +512,6 @@ static struct edma_soc_info edma_cc0_info = { 
	.n_slot			= 128,

	.n_slot			= 128,

	.n_tc			= 2,

	.n_tc			= 2,

	.n_cc			= 1,

	.n_cc			= 1,

	.queue_tc_mapping	= queue_tc_mapping,

	.queue_priority_mapping	= queue_priority_mapping,

	.queue_priority_mapping	= queue_priority_mapping,

	.default_queue		= EVENTQ_1,

	.default_queue		= EVENTQ_1,

};

};

arch/arm/mach-davinci/dm646x.c

+0 −11
Original line number Original line Diff line number Diff line
@@ -532,16 +532,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { 
/*----------------------------------------------------------------------*/

/*----------------------------------------------------------------------*/





/* Four Transfer Controllers on DM646x */

/* Four Transfer Controllers on DM646x */

static s8

dm646x_queue_tc_mapping[][2] = {

	/* {event queue no, TC no} */

	{0, 0},

	{1, 1},

	{2, 2},

	{3, 3},

	{-1, -1},

};



static s8

static s8

dm646x_queue_priority_mapping[][2] = {

dm646x_queue_priority_mapping[][2] = {

	/* {event queue no, Priority} */

	/* {event queue no, Priority} */
@@ -558,7 +548,6 @@ static struct edma_soc_info edma_cc0_info = { 
	.n_slot			= 512,

	.n_slot			= 512,

	.n_tc			= 4,

	.n_tc			= 4,

	.n_cc			= 1,

	.n_cc			= 1,

	.queue_tc_mapping	= dm646x_queue_tc_mapping,

	.queue_priority_mapping	= dm646x_queue_priority_mapping,

	.queue_priority_mapping	= dm646x_queue_priority_mapping,

	.default_queue		= EVENTQ_1,

	.default_queue		= EVENTQ_1,

};

};