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Commit 8291113f authored by Paul Walmsley's avatar Paul Walmsley
Browse files

ARM: OMAP4: hwmod data: remove bandgap hwmod 



Commit 407a6888 ("OMAP4: hwmod data:
Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU") adds a
hwmod for the bandgap die temperature sensor IP block.  This IP block
has no interconnect port or firewall region, nor does it have an
independent register space or OCP control registers.  Its registers
are embedded in the System Control Module (SCM) IP block.  So it
appears that the bandgap device should be created by the SCM driver.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
parent 43085705

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+0 −30
Original line number Diff line number Diff line
@@ -823,33 +823,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { 
	.masters_cnt	= ARRAY_SIZE(omap44xx_aess_masters),

};



/*

 * 'bandgap' class

 * bangap reference for ldo regulators

 */



static struct omap_hwmod_class omap44xx_bandgap_hwmod_class = {

	.name	= "bandgap",

};



/* bandgap */

static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {

	{ .role = "fclk", .clk = "bandgap_fclk" },

};



static struct omap_hwmod omap44xx_bandgap_hwmod = {

	.name		= "bandgap",

	.class		= &omap44xx_bandgap_hwmod_class,

	.clkdm_name	= "l4_wkup_clkdm",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,

		},

	},

	.opt_clks	= bandgap_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(bandgap_opt_clks),

};



/*

 * 'counter' class

 * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
@@ -5467,9 +5440,6 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 
	/* aess class */

/*	&omap44xx_aess_hwmod, */



	/* bandgap class */

	&omap44xx_bandgap_hwmod,



	/* counter class */

/*	&omap44xx_counter_32k_hwmod, */