Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8212d563 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Move VLV PHY CRI clock enable into intel_init_dpio() 



The CRI clock is related to the display PHY, so the setup belongs
in intel_init_dpio().

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fff63867

drivers/gpu/drm/i915/intel_display.c

+4 −7
Original line number Diff line number Diff line
@@ -1367,6 +1367,10 @@ static void intel_init_dpio(struct drm_device *dev) 
	if (!IS_VALLEYVIEW(dev))

		return;



	/* Enable the CRI clock source so we can get at the display */

	I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |

		   DPLL_INTEGRATED_CRI_CLK_VLV);



	DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;

	/*

	 * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
@@ -10788,17 +10792,10 @@ static void i915_disable_vga(struct drm_device *dev) 


void intel_modeset_init_hw(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;



	intel_prepare_ddi(dev);



	intel_init_clock_gating(dev);



	/* Enable the CRI clock source so we can get at the display */

	if (IS_VALLEYVIEW(dev))

		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |

			   DPLL_INTEGRATED_CRI_CLK_VLV);



	intel_init_dpio(dev);



	mutex_lock(&dev->struct_mutex);