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Commit 81ba0a4e authored by Martin Bugge's avatar Martin Bugge Committed by Mauro Carvalho Chehab
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[media] adv7842: pixelclock read-out 



Incorrect registers used for pixelclock read-out.
Same registers as for adv7604 which actually gave an almost
correct read-out, even they are not documented for adv7842.
Corrected deep-color pixel-clock correction.

Signed-off-by: default avatarMartin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 933913da

drivers/media/i2c/adv7842.c

+3 −4
Original line number Diff line number Diff line
@@ -1449,12 +1449,11 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd, 


		bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);

		bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);

		freq = (hdmi_read(sd, 0x06) * 1000000) +

		       ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;



		freq = ((hdmi_read(sd, 0x51) << 1) + (hdmi_read(sd, 0x52) >> 7)) * 1000000;

		freq += ((hdmi_read(sd, 0x52) & 0x7f) * 7813);

		if (is_hdmi(sd)) {

			/* adjust for deep color mode */

			freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 5) + 8);

			freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 6) * 2 + 8);

		}

		bt->pixelclock = freq;

		bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +