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Commit 81564c89 authored by Taniya Das's avatar Taniya Das
Browse files

ARM: dts: msm: Update cluster PLL base adresses for MSM8952/37 



Due the re-organization of the code to support MSMGold the cluster bases
needs to be updated to support MSM8952 and MSM8937.

Change-Id: I63eaa02528c9c235de27b4dcdf04409a0d87603a
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent fc7a553a

arch/arm/boot/dts/qcom/msm8937.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -566,11 +566,11 @@ 
	clock_gcc: qcom,gcc@1800000 {

		compatible = "qcom,gcc-8937";

		reg = <0x1800000 0x80000>,

			<0xb116000 0x00040>,

			<0xb016000 0x00040>,

			<0xb116000 0x00040>,

			<0xb1d0000 0x00040>;

		reg-names = "cc_base", "apcs_c0_base",

			"apcs_c1_base", "apcs_cci_base";

		reg-names = "cc_base", "apcs_c1_base",

			"apcs_c0_base", "apcs_cci_base";

		vdd_dig-supply = <&pm8937_s2_level>;

		vdd_sr2_dig-supply = <&pm8937_s2_level_ao>;

		vdd_sr2_pll-supply = <&pm8937_l7_ao>;

arch/arm/boot/dts/qcom/msm8952.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -145,11 +145,11 @@ 
		#size-cells = <1>;

		compatible = "qcom,gcc-8952";

		reg = <0x1800000 0x80000>,

			<0xb116000 0x00040>,

			<0xb016000 0x00040>,

			<0xb116000 0x00040>,

			<0xb1d0000 0x00040>;

		reg-names = "cc_base", "apcs_c0_base",

			"apcs_c1_base", "apcs_cci_base";

		reg-names = "cc_base", "apcs_c1_base",

			"apcs_c0_base", "apcs_cci_base";

		vdd_dig-supply = <&pm8950_s2_level>;

		vdd_sr2_dig-supply = <&pm8950_s2_level_ao>;

		vdd_sr2_pll-supply = <&pm8950_l7_ao>;