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Commit 81243e44 authored by Rob Herring's avatar Rob Herring
Browse files

irqchip: Move ARM GIC to drivers/irqchip 



Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
is necessary to share the GIC with arm and arm64.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
parent 1d5cc604

arch/arm/common/Kconfig

+0 −8
Original line number Diff line number Diff line 
config ARM_GIC

	bool

	select IRQ_DOMAIN

	select MULTI_IRQ_HANDLER



config GIC_NON_BANKED

	bool



config ARM_VIC

	bool

	select IRQ_DOMAIN

arch/arm/common/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@ 
# Makefile for the linux kernel.

#



obj-$(CONFIG_ARM_GIC)		+= gic.o

obj-$(CONFIG_ARM_VIC)		+= vic.o

obj-$(CONFIG_ICST)		+= icst.o

obj-$(CONFIG_SA1111)		+= sa1111.o

drivers/irqchip/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -2,6 +2,14 @@ config IRQCHIP 
	def_bool y

	depends on OF_IRQ



config ARM_GIC

	bool

	select IRQ_DOMAIN

	select MULTI_IRQ_HANDLER



config GIC_NON_BANKED

	bool



config VERSATILE_FPGA_IRQ

	bool

	select IRQ_DOMAIN

drivers/irqchip/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -2,5 +2,6 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o 


obj-$(CONFIG_ARCH_BCM2835)		+= irq-bcm2835.o

obj-$(CONFIG_ARCH_SUNXI)		+= irq-sunxi.o

obj-$(CONFIG_VERSATILE_FPGA_IRQ)	+= irq-versatile-fpga.o

obj-$(CONFIG_ARCH_SPEAR3XX)		+= spear-shirq.o

obj-$(CONFIG_ARM_GIC)			+= irq-gic.o

obj-$(CONFIG_VERSATILE_FPGA_IRQ)	+= irq-versatile-fpga.o

arch/arm/common/gic.c→drivers/irqchip/irq-gic.c

+7 −0
Original line number Diff line number Diff line
@@ -45,6 +45,8 @@ 
#include <asm/mach/irq.h>

#include <asm/hardware/gic.h>



#include "irqchip.h"



union gic_base {

	void __iomem *common_base;

	void __percpu __iomem **percpu_base;
@@ -814,4 +816,9 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) 
	gic_cnt++;

	return 0;

}

IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);

IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);

IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);

IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);



#endif