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Commit 810ee58d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (29 commits)
  xen: unitialised return value in xenbus_write_transaction
  x86: fix section mismatch warning
  x86: unmask CPUID levels on Intel CPUs, fix
  x86: work around PAGE_KERNEL_WC not getting WC in iomap_atomic_prot_pfn.
  x86: use standard PIT frequency
  xen: handle highmem pages correctly when shrinking a domain
  x86, mm: fix pte_free()
  xen: actually release memory when shrinking domain
  x86: unmask CPUID levels on Intel CPUs
  x86: add MSR_IA32_MISC_ENABLE bits to <asm/msr-index.h>
  x86: fix PTE corruption issue while mapping RAM using /dev/mem
  x86: mtrr fix debug boot parameter
  x86: fix page attribute corruption with cpa()
  Revert "x86: signal: change type of paramter for sys_rt_sigreturn()"
  x86: use early clobbers in usercopy*.c
  x86: remove kernel_physical_mapping_init() from init section
  fix: crash: IP: __bitmap_intersects+0x48/0x73
  cpufreq: use work_on_cpu in acpi-cpufreq.c for drv_read and drv_write
  work_on_cpu: Use our own workqueue.
  work_on_cpu: don't try to get_online_cpus() in work_on_cpu.
  ...
parents 2927fcea e88a0faa

arch/x86/include/asm/bitops.h

+10 −4
Original line number Diff line number Diff line
@@ -3,6 +3,9 @@ 


/*

 * Copyright 1992, Linus Torvalds.

 *

 * Note: inlines with more than a single statement should be marked

 * __always_inline to avoid problems with older gcc's inlining heuristics.

 */



#ifndef _LINUX_BITOPS_H
@@ -53,7 +56,8 @@ 
 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */

static inline void set_bit(unsigned int nr, volatile unsigned long *addr)

static __always_inline void

set_bit(unsigned int nr, volatile unsigned long *addr)

{

	if (IS_IMMEDIATE(nr)) {

		asm volatile(LOCK_PREFIX "orb %1,%0"
@@ -90,7 +94,8 @@ static inline void __set_bit(int nr, volatile unsigned long *addr) 
 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()

 * in order to ensure changes are visible on other processors.

 */

static inline void clear_bit(int nr, volatile unsigned long *addr)

static __always_inline void

clear_bit(int nr, volatile unsigned long *addr)

{

	if (IS_IMMEDIATE(nr)) {

		asm volatile(LOCK_PREFIX "andb %1,%0"
@@ -204,7 +209,8 @@ static inline int test_and_set_bit(int nr, volatile unsigned long *addr) 
 *

 * This is the same as test_and_set_bit on x86.

 */

static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr)

static __always_inline int

test_and_set_bit_lock(int nr, volatile unsigned long *addr)

{

	return test_and_set_bit(nr, addr);

}
@@ -300,7 +306,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr) 
	return oldbit;

}



static inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr)

static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr)

{

	return ((1UL << (nr % BITS_PER_LONG)) &

		(((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;

arch/x86/include/asm/io.h

+0 −1
Original line number Diff line number Diff line
@@ -99,7 +99,6 @@ extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); 
 * A boot-time mapping is currently limited to at most 16 pages.

 */

extern void early_ioremap_init(void);

extern void early_ioremap_clear(void);

extern void early_ioremap_reset(void);

extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);

extern void __iomem *early_memremap(unsigned long offset, unsigned long size);

arch/x86/include/asm/msr-index.h

+29 −0
Original line number Diff line number Diff line
@@ -202,6 +202,35 @@ 
#define MSR_IA32_THERM_STATUS		0x0000019c

#define MSR_IA32_MISC_ENABLE		0x000001a0



/* MISC_ENABLE bits: architectural */

#define MSR_IA32_MISC_ENABLE_FAST_STRING	(1ULL << 0)

#define MSR_IA32_MISC_ENABLE_TCC		(1ULL << 1)

#define MSR_IA32_MISC_ENABLE_EMON		(1ULL << 7)

#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL	(1ULL << 11)

#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL	(1ULL << 12)

#define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP	(1ULL << 16)

#define MSR_IA32_MISC_ENABLE_MWAIT		(1ULL << 18)

#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID	(1ULL << 22)

#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE	(1ULL << 23)

#define MSR_IA32_MISC_ENABLE_XD_DISABLE		(1ULL << 34)



/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */

#define MSR_IA32_MISC_ENABLE_X87_COMPAT		(1ULL << 2)

#define MSR_IA32_MISC_ENABLE_TM1		(1ULL << 3)

#define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE	(1ULL << 4)

#define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE	(1ULL << 6)

#define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK	(1ULL << 8)

#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE	(1ULL << 9)

#define MSR_IA32_MISC_ENABLE_FERR		(1ULL << 10)

#define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX	(1ULL << 10)

#define MSR_IA32_MISC_ENABLE_TM2		(1ULL << 13)

#define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE	(1ULL << 19)

#define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK	(1ULL << 20)

#define MSR_IA32_MISC_ENABLE_L1D_CONTEXT	(1ULL << 24)

#define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE	(1ULL << 37)

#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE	(1ULL << 38)

#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE	(1ULL << 39)



/* Intel Model 6 */

#define MSR_P6_EVNTSEL0			0x00000186

#define MSR_P6_EVNTSEL1			0x00000187

arch/x86/include/asm/pgalloc.h

+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) 


static inline void pte_free(struct mm_struct *mm, struct page *pte)

{

	pgtable_page_dtor(pte);

	__free_page(pte);

}

arch/x86/include/asm/syscalls.h

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, 
			     struct old_sigaction __user *);

asmlinkage int sys_sigaltstack(unsigned long);

asmlinkage unsigned long sys_sigreturn(unsigned long);

asmlinkage int sys_rt_sigreturn(struct pt_regs);

asmlinkage int sys_rt_sigreturn(unsigned long);



/* kernel/ioport.c */

asmlinkage long sys_iopl(unsigned long);