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Commit 80f15dc7 authored by Paul Mackerras's avatar Paul Mackerras
Browse files

powerpc: Provide a suitable AT_PLATFORM value 



The glibc folks want to use AT_PLATFORM to select between possible
alternative versions of shared libraries.  This commit makes the kernel
supply an AT_PLATFORM string that indicates what class of processor
we are running on.  Processors with the same set of user-level
instructions and roughly the same instruction scheduling characteristics
are given the same AT_PLATFORM value; for example, 821, 823 and 860
are all reported as "ppc823", and 7447, 7447A, 7448, 7450, 7451, 7455
are all called "ppc7450".

The intention is that the AT_PLATFORM values match the values that
gcc accepts for the -mcpu= option.  For values which are numeric
(e.g. -mcpu=750), "ppc" has been prepended.

This also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value and sets
it for the 440 family and the Freescale 85xx family.

Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 25cd6aa0

arch/powerpc/kernel/cputable.c

+128 −44
Original line number Diff line number Diff line
@@ -55,7 +55,8 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 
#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)

#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5)

#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS)



#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \

				 PPC_FEATURE_BOOKE)



/* We only set the spe features if the kernel was compiled with

 * spe support
@@ -80,6 +81,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/power3",

		.oprofile_type		= RS64,

		.platform		= "power3",

	},

	{	/* Power3+ */

		.pvr_mask		= 0xffff0000,
@@ -93,6 +95,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/power3",

		.oprofile_type		= RS64,

		.platform		= "power3",

	},

	{	/* Northstar */

		.pvr_mask		= 0xffff0000,
@@ -106,6 +109,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/rs64",

		.oprofile_type		= RS64,

		.platform		= "rs64",

	},

	{	/* Pulsar */

		.pvr_mask		= 0xffff0000,
@@ -119,6 +123,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/rs64",

		.oprofile_type		= RS64,

		.platform		= "rs64",

	},

	{	/* I-star */

		.pvr_mask		= 0xffff0000,
@@ -132,6 +137,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/rs64",

		.oprofile_type		= RS64,

		.platform		= "rs64",

	},

	{	/* S-star */

		.pvr_mask		= 0xffff0000,
@@ -145,6 +151,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power3,

		.oprofile_cpu_type	= "ppc64/rs64",

		.oprofile_type		= RS64,

		.platform		= "rs64",

	},

	{	/* Power4 */

		.pvr_mask		= 0xffff0000,
@@ -158,6 +165,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power4,

		.oprofile_cpu_type	= "ppc64/power4",

		.oprofile_type		= POWER4,

		.platform		= "power4",

	},

	{	/* Power4+ */

		.pvr_mask		= 0xffff0000,
@@ -171,6 +179,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power4,

		.oprofile_cpu_type	= "ppc64/power4",

		.oprofile_type		= POWER4,

		.platform		= "power4",

	},

	{	/* PPC970 */

		.pvr_mask		= 0xffff0000,
@@ -185,6 +194,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_ppc970,

		.oprofile_cpu_type	= "ppc64/970",

		.oprofile_type		= POWER4,

		.platform		= "ppc970",

	},

#endif /* CONFIG_PPC64 */

#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
@@ -205,6 +215,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_ppc970,

		.oprofile_cpu_type	= "ppc64/970",

		.oprofile_type		= POWER4,

		.platform		= "ppc970",

	},

#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */

#ifdef CONFIG_PPC64
@@ -220,6 +231,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_ppc970,

		.oprofile_cpu_type	= "ppc64/970",

		.oprofile_type		= POWER4,

		.platform		= "ppc970",

	},

	{	/* Power5 GR */

		.pvr_mask		= 0xffff0000,
@@ -233,6 +245,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power4,

		.oprofile_cpu_type	= "ppc64/power5",

		.oprofile_type		= POWER4,

		.platform		= "power5",

	},

	{	/* Power5 GS */

		.pvr_mask		= 0xffff0000,
@@ -246,6 +259,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_power4,

		.oprofile_cpu_type	= "ppc64/power5+",

		.oprofile_type		= POWER4,

		.platform		= "power5+",

	},

	{	/* Cell Broadband Engine */

		.pvr_mask		= 0xffff0000,
@@ -257,6 +271,7 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 128,

		.dcache_bsize		= 128,

		.cpu_setup		= __setup_cpu_be,

		.platform		= "ppc-cell-be",

	},

	{	/* default match */

		.pvr_mask		= 0x00000000,
@@ -268,6 +283,7 @@ struct cpu_spec cpu_specs[] = { 
		.dcache_bsize		= 128,

		.num_pmcs		= 6,

		.cpu_setup		= __setup_cpu_power4,

		.platform		= "power4",

	}

#endif	/* CONFIG_PPC64 */

#ifdef CONFIG_PPC32
@@ -281,6 +297,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc601",

	},

	{	/* 603 */

		.pvr_mask		= 0xffff0000,
@@ -290,7 +307,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* 603e */

		.pvr_mask		= 0xffff0000,
@@ -300,7 +318,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* 603ev */

		.pvr_mask		= 0xffff0000,
@@ -310,7 +329,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* 604 */

		.pvr_mask		= 0xffff0000,
@@ -321,7 +341,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 2,

		.cpu_setup		= __setup_cpu_604

		.cpu_setup		= __setup_cpu_604,

		.platform		= "ppc604",

	},

	{	/* 604e */

		.pvr_mask		= 0xfffff000,
@@ -332,7 +353,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_604

		.cpu_setup		= __setup_cpu_604,

		.platform		= "ppc604",

	},

	{	/* 604r */

		.pvr_mask		= 0xffff0000,
@@ -343,7 +365,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_604

		.cpu_setup		= __setup_cpu_604,

		.platform		= "ppc604",

	},

	{	/* 604ev */

		.pvr_mask		= 0xffff0000,
@@ -354,7 +377,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_604

		.cpu_setup		= __setup_cpu_604,

		.platform		= "ppc604",

	},

	{	/* 740/750 (0x4202, don't support TAU ?) */

		.pvr_mask		= 0xffffffff,
@@ -365,7 +389,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750

		.cpu_setup		= __setup_cpu_750,

		.platform		= "ppc750",

	},

	{	/* 750CX (80100 and 8010x?) */

		.pvr_mask		= 0xfffffff0,
@@ -376,7 +401,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750cx

		.cpu_setup		= __setup_cpu_750cx,

		.platform		= "ppc750",

	},

	{	/* 750CX (82201 and 82202) */

		.pvr_mask		= 0xfffffff0,
@@ -387,7 +413,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750cx

		.cpu_setup		= __setup_cpu_750cx,

		.platform		= "ppc750",

	},

	{	/* 750CXe (82214) */

		.pvr_mask		= 0xfffffff0,
@@ -398,7 +425,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750cx

		.cpu_setup		= __setup_cpu_750cx,

		.platform		= "ppc750",

	},

	{	/* 750CXe "Gekko" (83214) */

		.pvr_mask		= 0xffffffff,
@@ -409,7 +437,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750cx

		.cpu_setup		= __setup_cpu_750cx,

		.platform		= "ppc750",

	},

	{	/* 745/755 */

		.pvr_mask		= 0xfffff000,
@@ -420,7 +449,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750

		.cpu_setup		= __setup_cpu_750,

		.platform		= "ppc750",

	},

	{	/* 750FX rev 1.x */

		.pvr_mask		= 0xffffff00,
@@ -431,7 +461,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750

		.cpu_setup		= __setup_cpu_750,

		.platform		= "ppc750",

	},

	{	/* 750FX rev 2.0 must disable HID0[DPM] */

		.pvr_mask		= 0xffffffff,
@@ -442,7 +473,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750

		.cpu_setup		= __setup_cpu_750,

		.platform		= "ppc750",

	},

	{	/* 750FX (All revs except 2.0) */

		.pvr_mask		= 0xffff0000,
@@ -453,7 +485,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750fx

		.cpu_setup		= __setup_cpu_750fx,

		.platform		= "ppc750",

	},

	{	/* 750GX */

		.pvr_mask		= 0xffff0000,
@@ -464,7 +497,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750fx

		.cpu_setup		= __setup_cpu_750fx,

		.platform		= "ppc750",

	},

	{	/* 740/750 (L2CR bit need fixup for 740) */

		.pvr_mask		= 0xffff0000,
@@ -475,7 +509,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_750

		.cpu_setup		= __setup_cpu_750,

		.platform		= "ppc750",

	},

	{	/* 7400 rev 1.1 ? (no TAU) */

		.pvr_mask		= 0xffffffff,
@@ -486,7 +521,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_7400

		.cpu_setup		= __setup_cpu_7400,

		.platform		= "ppc7400",

	},

	{	/* 7400 */

		.pvr_mask		= 0xffff0000,
@@ -497,7 +533,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_7400

		.cpu_setup		= __setup_cpu_7400,

		.platform		= "ppc7400",

	},

	{	/* 7410 */

		.pvr_mask		= 0xffff0000,
@@ -508,7 +545,8 @@ struct cpu_spec cpu_specs[] = { 
		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.cpu_setup		= __setup_cpu_7410

		.cpu_setup		= __setup_cpu_7410,

		.platform		= "ppc7400",

	},

	{	/* 7450 2.0 - no doze/nap */

		.pvr_mask		= 0xffffffff,
@@ -522,6 +560,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7450 2.1 */

		.pvr_mask		= 0xffffffff,
@@ -535,6 +574,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7450 2.3 and newer */

		.pvr_mask		= 0xffff0000,
@@ -548,6 +588,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7455 rev 1.x */

		.pvr_mask		= 0xffffff00,
@@ -561,6 +602,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7455 rev 2.0 */

		.pvr_mask		= 0xffffffff,
@@ -574,6 +616,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7455 others */

		.pvr_mask		= 0xffff0000,
@@ -587,6 +630,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7447/7457 Rev 1.0 */

		.pvr_mask		= 0xffffffff,
@@ -600,6 +644,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7447/7457 Rev 1.1 */

		.pvr_mask		= 0xffffffff,
@@ -613,6 +658,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7447/7457 Rev 1.2 and later */

		.pvr_mask		= 0xffff0000,
@@ -626,6 +672,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7447A */

		.pvr_mask		= 0xffff0000,
@@ -639,6 +686,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 7448 */

		.pvr_mask		= 0xffff0000,
@@ -652,6 +700,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_setup		= __setup_cpu_745x,

		.oprofile_cpu_type      = "ppc/7450",

		.oprofile_type		= G4,

		.platform		= "ppc7450",

	},

	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */

		.pvr_mask		= 0x7fff0000,
@@ -661,7 +710,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* All G2_LE (603e core, plus some) have the same pvr */

		.pvr_mask		= 0x7fff0000,
@@ -671,7 +721,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* e300 (a 603e core, plus some) on 83xx */

		.pvr_mask		= 0x7fff0000,
@@ -681,7 +732,8 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.cpu_setup		= __setup_cpu_603

		.cpu_setup		= __setup_cpu_603,

		.platform		= "ppc603",

	},

	{	/* default match, we assume split I/D cache & TB (non-601)... */

		.pvr_mask		= 0x00000000,
@@ -691,6 +743,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= COMMON_USER,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc603",

	},

#endif /* CLASSIC_PPC */

#ifdef CONFIG_8xx
@@ -704,6 +757,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.icache_bsize		= 16,

		.dcache_bsize		= 16,

		.platform		= "ppc823",

	},

#endif /* CONFIG_8xx */

#ifdef CONFIG_40x
@@ -715,6 +769,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.icache_bsize		= 16,

		.dcache_bsize		= 16,

		.platform		= "ppc403",

	},

	{	/* 403GCX */

		.pvr_mask		= 0xffffff00,
@@ -725,6 +780,7 @@ struct cpu_spec cpu_specs[] = { 
		 	PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,

		.icache_bsize		= 16,

		.dcache_bsize		= 16,

		.platform		= "ppc403",

	},

	{	/* 403G ?? */

		.pvr_mask		= 0xffff0000,
@@ -734,6 +790,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.icache_bsize		= 16,

		.dcache_bsize		= 16,

		.platform		= "ppc403",

	},

	{	/* 405GP */

		.pvr_mask		= 0xffff0000,
@@ -744,6 +801,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* STB 03xxx */

		.pvr_mask		= 0xffff0000,
@@ -754,6 +812,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* STB 04xxx */

		.pvr_mask		= 0xffff0000,
@@ -764,6 +823,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* NP405L */

		.pvr_mask		= 0xffff0000,
@@ -774,6 +834,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* NP4GS3 */

		.pvr_mask		= 0xffff0000,
@@ -784,6 +845,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{   /* NP405H */

		.pvr_mask		= 0xffff0000,
@@ -794,6 +856,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* 405GPr */

		.pvr_mask		= 0xffff0000,
@@ -804,6 +867,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{   /* STBx25xx */

		.pvr_mask		= 0xffff0000,
@@ -814,6 +878,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* 405LP */

		.pvr_mask		= 0xffff0000,
@@ -823,6 +888,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* Xilinx Virtex-II Pro  */

		.pvr_mask		= 0xffff0000,
@@ -833,6 +899,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},

	{	/* 405EP */

		.pvr_mask		= 0xffff0000,
@@ -843,6 +910,7 @@ struct cpu_spec cpu_specs[] = { 
			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc405",

	},



#endif /* CONFIG_40x */
@@ -852,81 +920,90 @@ struct cpu_spec cpu_specs[] = { 
		.pvr_value		= 0x40000850,

		.cpu_name		= "440EP Rev. A",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= COMMON_USER, /* 440EP has an FPU */

		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x400008d3,

		.cpu_name		= "440EP Rev. B",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= COMMON_USER, /* 440EP has an FPU */

		.cpu_user_features	= COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{	/* 440GP Rev. B */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x40000440,

		.cpu_name		= "440GP Rev. B",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440gp",

	},

	{	/* 440GP Rev. C */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x40000481,

		.cpu_name		= "440GP Rev. C",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440gp",

	},

	{ /* 440GX Rev. A */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x50000850,

		.cpu_name		= "440GX Rev. A",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{ /* 440GX Rev. B */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x50000851,

		.cpu_name		= "440GX Rev. B",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{ /* 440GX Rev. C */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x50000892,

		.cpu_name		= "440GX Rev. C",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{ /* 440GX Rev. F */

		.pvr_mask		= 0xf0000fff,

		.pvr_value		= 0x50000894,

		.cpu_name		= "440GX Rev. F",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{ /* 440SP Rev. A */

		.pvr_mask		= 0xff000fff,

		.pvr_value		= 0x53000891,

		.cpu_name		= "440SP Rev. A",

		.cpu_features		= CPU_FTRS_44X,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

	{ /* 440SPe Rev. A */

		.pvr_mask		= 0xff000fff,
@@ -934,9 +1011,10 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_name		= "440SPe Rev. A",

		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |

			CPU_FTR_USE_TB,

		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,

		.cpu_user_features	= COMMON_USER_BOOKE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "ppc440",

	},

#endif /* CONFIG_44x */

#ifdef CONFIG_FSL_BOOKE
@@ -946,10 +1024,11 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_name		= "e200z5",

		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */

		.cpu_features		= CPU_FTRS_E200,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |

		.cpu_user_features	= COMMON_USER_BOOKE |

			PPC_FEATURE_HAS_EFP_SINGLE |

			PPC_FEATURE_UNIFIED_CACHE,

		.dcache_bsize		= 32,

		.platform		= "ppc5554",

	},

	{	/* e200z6 */

		.pvr_mask		= 0xfff00000,
@@ -957,11 +1036,12 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_name		= "e200z6",

		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */

		.cpu_features		= CPU_FTRS_E200,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |

		.cpu_user_features	= COMMON_USER_BOOKE |

			PPC_FEATURE_SPE_COMP |

			PPC_FEATURE_HAS_EFP_SINGLE |

			PPC_FEATURE_UNIFIED_CACHE,

		.dcache_bsize		= 32,

		.platform		= "ppc5554",

	},

	{	/* e500 */

		.pvr_mask		= 0xffff0000,
@@ -969,14 +1049,15 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_name		= "e500",

		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */

		.cpu_features		= CPU_FTRS_E500,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |

		.cpu_user_features	= COMMON_USER_BOOKE |

			PPC_FEATURE_SPE_COMP |

			PPC_FEATURE_HAS_EFP_SINGLE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.oprofile_cpu_type	= "ppc/e500",

		.oprofile_type		= BOOKE,

		.platform		= "ppc8540",

	},

	{	/* e500v2 */

		.pvr_mask		= 0xffff0000,
@@ -984,14 +1065,16 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_name		= "e500v2",

		/* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */

		.cpu_features		= CPU_FTRS_E500_2,

		.cpu_user_features	= PPC_FEATURE_32 |

			PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |

			PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,

		.cpu_user_features	= COMMON_USER_BOOKE |

			PPC_FEATURE_SPE_COMP |

			PPC_FEATURE_HAS_EFP_SINGLE |

			PPC_FEATURE_HAS_EFP_DOUBLE,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.num_pmcs		= 4,

		.oprofile_cpu_type	= "ppc/e500",

		.oprofile_type		= BOOKE,

		.platform		= "ppc8548",

	},

#endif

#if !CLASSIC_PPC
@@ -1003,6 +1086,7 @@ struct cpu_spec cpu_specs[] = { 
		.cpu_user_features	= PPC_FEATURE_32,

		.icache_bsize		= 32,

		.dcache_bsize		= 32,

		.platform		= "powerpc",

	}

#endif /* !CLASSIC_PPC */

#endif /* CONFIG_PPC32 */

include/asm-powerpc/cputable.h

+4 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#define PPC_FEATURE_POWER5		0x00040000

#define PPC_FEATURE_POWER5_PLUS		0x00020000

#define PPC_FEATURE_CELL		0x00010000

#define PPC_FEATURE_BOOKE		0x00008000



#ifdef __KERNEL__

#ifndef __ASSEMBLY__
@@ -64,6 +65,9 @@ struct cpu_spec { 


	/* Processor specific oprofile operations */

	enum powerpc_oprofile_type oprofile_type;



	/* Name of processor class, for the ELF AT_PLATFORM entry */

	char		*platform;

};



extern struct cpu_spec		*cur_cpu_spec;

include/asm-powerpc/elf.h

+7 −9
Original line number Diff line number Diff line
@@ -221,20 +221,18 @@ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 
   instruction set this cpu supports.  This could be done in userspace,

   but it's not easy, and we've already done it here.  */

# define ELF_HWCAP	(cur_cpu_spec->cpu_user_features)

#ifdef __powerpc64__

# define ELF_PLAT_INIT(_r, load_addr)	do {	\

	_r->gpr[2] = load_addr; 		\

} while (0)

#endif /* __powerpc64__ */



/* This yields a string that ld.so will use to load implementation

   specific libraries for optimization.  This is more specific in

   intent than poking at uname or /proc/cpuinfo.

   intent than poking at uname or /proc/cpuinfo.  */



   For the moment, we have only optimizations for the Intel generations,

   but that could change... */

#define ELF_PLATFORM	(cur_cpu_spec->platform)



#define ELF_PLATFORM	(NULL)

#ifdef __powerpc64__

# define ELF_PLAT_INIT(_r, load_addr)	do {	\

	_r->gpr[2] = load_addr; 		\

} while (0)

#endif /* __powerpc64__ */



#ifdef __KERNEL__