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Commit 7f69ed3b authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy Committed by Matt Wagantall
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ARM: gic: Use _no_log variants while accessing some registers 



Some GIC register accesses happens more frequently flooding the
RTB logs. Since they're not that useful for debugging purposes,
use _no_log variants while accessing those registers.

Change-Id: I13b57f5a069bf732f1b9d9f0afb87d291cc5dd48
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
[abhimany: fixup gic_cpu_save]
Signed-off-by: default avatarAbhimanyu Kapur <abhimany@codeaurora.org>
parent bfc6967c

drivers/irqchip/irq-gic.c

+18 −14
Original line number Diff line number Diff line
@@ -296,7 +296,7 @@ static void gic_eoi_irq(struct irq_data *d) 
		raw_spin_unlock(&irq_controller_lock);

	}



	writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);

	writel_relaxed_no_log(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);

}



static int gic_set_type(struct irq_data *d, unsigned int type)
@@ -351,8 +351,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 
	raw_spin_lock(&irq_controller_lock);

	mask = 0xff << shift;

	bit = gic_cpu_map[cpu] << shift;

	val = readl_relaxed(reg) & ~mask;

	writel_relaxed(val | bit, reg);

	val = readl_relaxed_no_log(reg) & ~mask;

	writel_relaxed_no_log(val | bit, reg);

	raw_spin_unlock(&irq_controller_lock);



	return IRQ_SET_MASK_OK;
@@ -395,7 +395,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) 
	void __iomem *cpu_base = gic_data_cpu_base(gic);



	do {

		irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);

		irqstat = readl_relaxed_no_log(cpu_base + GIC_CPU_INTACK);

		irqnr = irqstat & GICC_IAR_INT_ID_MASK;



		if (likely(irqnr > 15 && irqnr < 1021)) {
@@ -404,7 +404,7 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) 
			continue;

		}

		if (irqnr < 16) {

			writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);

			writel_relaxed_no_log(irqstat, cpu_base + GIC_CPU_EOI);

#ifdef CONFIG_SMP

			handle_IPI(irqnr, regs);

#endif
@@ -495,7 +495,7 @@ static void gic_cpu_if_up(void) 
	bypass = readl(cpu_base + GIC_CPU_CTRL);

	bypass &= GICC_DIS_BYPASS_MASK;



	writel_relaxed(bypass | GICC_ENABLE, cpu_base + GIC_CPU_CTRL);

	writel_relaxed_no_log(bypass | GICC_ENABLE, cpu_base + GIC_CPU_CTRL);

}
@@ -656,11 +656,13 @@ static void gic_cpu_save(unsigned int gic_nr) 


	ptr = raw_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);

	for (i = 0; i < DIV_ROUND_UP(32, 32); i++)

		ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);

		ptr[i] = readl_relaxed_no_log(dist_base +

				GIC_DIST_ENABLE_SET + i * 4);



	ptr = raw_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);

	for (i = 0; i < DIV_ROUND_UP(32, 16); i++)

		ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);

		ptr[i] = readl_relaxed_no_log(dist_base +

				GIC_DIST_CONFIG + i * 4);



}
@@ -682,17 +684,19 @@ static void gic_cpu_restore(unsigned int gic_nr) 


	ptr = raw_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);

	for (i = 0; i < DIV_ROUND_UP(32, 32); i++)

		writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4);

		writel_relaxed_no_log(ptr[i], dist_base +

			GIC_DIST_ENABLE_SET + i * 4);



	ptr = raw_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);

	for (i = 0; i < DIV_ROUND_UP(32, 16); i++)

		writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4);

		writel_relaxed_no_log(ptr[i], dist_base +

			GIC_DIST_CONFIG + i * 4);



	for (i = 0; i < DIV_ROUND_UP(32, 4); i++)

		writel_relaxed(GICD_INT_DEF_PRI_X4,

		writel_relaxed_no_log(GICD_INT_DEF_PRI_X4,

					dist_base + GIC_DIST_PRI + i * 4);



	writel_relaxed(GICC_INT_PRI_THRESHOLD, cpu_base + GIC_CPU_PRIMASK);

	writel_relaxed_no_log(GICC_INT_PRI_THRESHOLD, cpu_base + GIC_CPU_PRIMASK);

	gic_cpu_if_up();

}
@@ -769,8 +773,8 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) 
	dmb(ishst);



	/* this always happens on GIC0 */

	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);



	writel_relaxed_no_log(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);

	mb();

	raw_spin_unlock_irqrestore(&gic_sgi_lock, flags);

}

#endif