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Commit 7f06a3b2 authored by David S. Miller's avatar David S. Miller
Browse files

sparc: Kill videopix SBUS driver. 



This has been marked BROKEN for a long time and it's more likely
to get rewritten from scratch than to be fixed up and made usable.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 902663f6

arch/sparc/include/asm/Kbuild

+0 −1
Original line number Diff line number Diff line
@@ -40,5 +40,4 @@ header-y += reg_64.h 
header-y += traps.h

header-y += uctx.h

header-y += utrap.h

header-y += vfc_ioctls.h

header-y += watchdog.h

arch/sparc/include/asm/vfc_ioctls.h

deleted100644 → 0
+0 −58
Original line number Diff line number Diff line 
/* Copyright (c) 1996 by Manish Vachharajani */



#ifndef _LINUX_VFC_IOCTLS_H_

#define	_LINUX_VFC_IOCTLS_H_



	/* IOCTLs */

#define VFC_IOCTL(a)          (('j' << 8) | a)

#define VFCGCTRL	(VFC_IOCTL (0))	        /* get vfc attributes */

#define VFCSCTRL	(VFC_IOCTL (1))  	/* set vfc attributes */

#define VFCGVID		(VFC_IOCTL (2)) 	/* get video decoder attributes */

#define VFCSVID		(VFC_IOCTL (3))	        /* set video decoder attributes */

#define VFCHUE		(VFC_IOCTL (4))   	/* set hue */

#define VFCPORTCHG	(VFC_IOCTL (5))  	/* change port */

#define VFCRDINFO	(VFC_IOCTL (6))  	/* read info */



	/* Options for setting the vfc attributes and status */

#define MEMPRST		0x1	/* reset FIFO ptr. */

#define CAPTRCMD	0x2	/* start capture and wait */

#define DIAGMODE	0x3	/* diag mode */

#define NORMMODE	0x4	/* normal mode */

#define CAPTRSTR	0x5	/* start capture */

#define CAPTRWAIT	0x6	/* wait for capture to finish */





	/* Options for the decoder */

#define STD_NTSC	0x1	/* NTSC mode */

#define STD_PAL		0x2	/* PAL mode */

#define COLOR_ON	0x3	/* force color ON */

#define MONO		0x4	/* force color OFF */



	/* Values returned by ioctl 2 */



#define NO_LOCK	        1

#define NTSC_COLOR	2

#define NTSC_NOCOLOR    3

#define PAL_COLOR	4

#define PAL_NOCOLOR	5



/* Not too sure what this does yet */

	/* Options for setting Field number */

#define ODD_FIELD	0x1

#define EVEN_FIELD	0x0

#define ACTIVE_ONLY     0x2

#define NON_ACTIVE	0x0



/* Debug options */

#define VFC_I2C_SEND 0

#define VFC_I2C_RECV 1



struct vfc_debug_inout

{

	unsigned long addr;

	unsigned long ret;

	unsigned long len;

	unsigned char __user *buffer;

};



#endif /* _LINUX_VFC_IOCTLS_H_ */

drivers/sbus/char/Kconfig

+0 −9
Original line number Diff line number Diff line
@@ -30,15 +30,6 @@ config OBP_FLASH 
	  The OpenBoot PROM on Ultra systems is flashable. If you want to be

	  able to upgrade the OBP firmware, say Y here.



config SUN_VIDEOPIX

	tristate "Videopix Frame Grabber (EXPERIMENTAL)"

	depends on EXPERIMENTAL && (BROKEN || !64BIT)

	help

	  Say Y here to support the Videopix Frame Grabber from Sun

	  Microsystems, commonly found on SPARCstations.  This card, which is

	  based on the Phillips SAA9051, can handle NTSC and PAL/SECAM and

	  SVIDEO signals.



config TADPOLE_TS102_UCTRL

	tristate "Tadpole TS102 Microcontroller support (EXPERIMENTAL)"

	depends on EXPERIMENTAL && SPARC32

drivers/sbus/char/Makefile

+0 −2
Original line number Diff line number Diff line
@@ -7,7 +7,6 @@ 
# Rewritten to use lists instead of if-statements.

#



vfc-objs := vfc_dev.o vfc_i2c.o

bbc-objs := bbc_i2c.o bbc_envctrl.o



obj-$(CONFIG_ENVCTRL)			+= envctrl.o
@@ -17,7 +16,6 @@ obj-$(CONFIG_WATCHDOG_RIO) += riowatchdog.o 
obj-$(CONFIG_OBP_FLASH)			+= flash.o

obj-$(CONFIG_SUN_OPENPROMIO)		+= openprom.o

obj-$(CONFIG_SUN_MOSTEK_RTC)		+= rtc.o

obj-$(CONFIG_SUN_VIDEOPIX)		+= vfc.o

obj-$(CONFIG_TADPOLE_TS102_UCTRL)	+= uctrl.o

obj-$(CONFIG_SUN_JSFLASH)		+= jsflash.o

obj-$(CONFIG_BBC_I2C)			+= bbc.o

drivers/sbus/char/vfc.h

deleted100644 → 0
+0 −171
Original line number Diff line number Diff line 
#ifndef _LINUX_VFC_H_

#define _LINUX_VFC_H_



/*

 * The control register for the vfc is at offset 0x4000

 * The first field ram bank is located at offset 0x5000

 * The second field ram bank is at offset 0x7000

 * i2c_reg address the Phillips PCF8584(see notes in vfc_i2c.c) 

 *    data and transmit register.

 * i2c_s1 controls register s1 of the PCF8584

 * i2c_write seems to be similar to i2c_write but I am not 

 *    quite sure why sun uses it

 * 

 * I am also not sure whether or not you can read the fram bank as a

 * whole or whether you must read each word individually from offset

 * 0x5000 as soon as I figure it out I will update this file */



struct vfc_regs {

	char pad1[0x4000];

	unsigned int control;  /* Offset 0x4000 */

	char pad2[0xffb];      /* from offset 0x4004 to 0x5000 */

	unsigned int fram_bank1; /* Offset 0x5000 */

	char pad3[0xffb];        /* from offset 0x5004 to 0x6000 */

	unsigned int i2c_reg; /* Offset 0x6000 */

	unsigned int i2c_magic2; /* Offset 0x6004 */

	unsigned int i2c_s1;  /* Offset 0x6008 */

	unsigned int i2c_write; /* Offset 0x600c */

	char pad4[0xff0];     /* from offset 0x6010 to 0x7000 */

	unsigned int fram_bank2; /* Offset 0x7000 */

	char pad5[0x1000];

};



#define VFC_SAA9051_NR (13)

#define VFC_SAA9051_ADDR (0x8a)

	/* The saa9051 returns the following for its status 

	 * bit 0 - 0

	 * bit 1 - SECAM color detected (1=found,0=not found)

	 * bit 2 - COLOR detected (1=found,0=not found)

	 * bit 3 - 0

	 * bit 4 - Field frequency bit (1=60Hz (NTSC), 0=50Hz (PAL))

	 * bit 5 - 1

	 * bit 6 - horizontal frequency lock (1=transmitter found,

	 *                                    0=no transmitter)

	 * bit 7 - Power on reset bit (1=reset,0=at least one successful 

	 *                                       read of the status byte)

	 */



#define VFC_SAA9051_PONRES (0x80)

#define VFC_SAA9051_HLOCK (0x40)

#define VFC_SAA9051_FD (0x10)

#define VFC_SAA9051_CD (0x04)

#define VFC_SAA9051_CS (0x02)





/* The various saa9051 sub addresses */



#define VFC_SAA9051_IDEL (0) 

#define VFC_SAA9051_HSY_START (1)

#define VFC_SAA9051_HSY_STOP (2)

#define VFC_SAA9051_HC_START (3)

#define VFC_SAA9051_HC_STOP (4)

#define VFC_SAA9051_HS_START (5)

#define VFC_SAA9051_HORIZ_PEAK (6)

#define VFC_SAA9051_HUE (7)

#define VFC_SAA9051_C1 (8)

#define VFC_SAA9051_C2 (9)

#define VFC_SAA9051_C3 (0xa)

#define VFC_SAA9051_SECAM_DELAY (0xb)





/* Bit settings for saa9051 sub address 0x06 */



#define VFC_SAA9051_AP1 (0x01)

#define VFC_SAA9051_AP2 (0x02)

#define VFC_SAA9051_COR1 (0x04)

#define VFC_SAA9051_COR2 (0x08)

#define VFC_SAA9051_BP1 (0x10)

#define VFC_SAA9051_BP2 (0x20)

#define VFC_SAA9051_PF (0x40)

#define VFC_SAA9051_BY (0x80)





/* Bit settings for saa9051 sub address 0x08 */



#define VFC_SAA9051_CCFR0 (0x01)

#define VFC_SAA9051_CCFR1 (0x02)

#define VFC_SAA9051_YPN (0x04)

#define VFC_SAA9051_ALT (0x08)

#define VFC_SAA9051_CO (0x10)

#define VFC_SAA9051_VTR (0x20)

#define VFC_SAA9051_FS (0x40)

#define VFC_SAA9051_HPLL (0x80)





/* Bit settings for saa9051 sub address 9 */



#define VFC_SAA9051_SS0 (0x01)

#define VFC_SAA9051_SS1 (0x02)

#define VFC_SAA9051_AFCC (0x04)

#define VFC_SAA9051_CI (0x08)

#define VFC_SAA9051_SA9D4 (0x10) /* Don't care bit */

#define VFC_SAA9051_OEC (0x20)

#define VFC_SAA9051_OEY (0x40)

#define VFC_SAA9051_VNL (0x80)





/* Bit settings for saa9051 sub address 0x0A */



#define VFC_SAA9051_YDL0 (0x01)

#define VFC_SAA9051_YDL1 (0x02)

#define VFC_SAA9051_YDL2 (0x04)

#define VFC_SAA9051_SS2 (0x08)

#define VFC_SAA9051_SS3 (0x10)

#define VFC_SAA9051_YC (0x20)

#define VFC_SAA9051_CT (0x40)

#define VFC_SAA9051_SYC (0x80)





#define VFC_SAA9051_SA(a,b) ((a)->saa9051_state_array[(b)+1])

#define vfc_update_saa9051(a) (vfc_i2c_sendbuf((a),VFC_SAA9051_ADDR,\

					    (a)->saa9051_state_array,\

					    VFC_SAA9051_NR))





struct vfc_dev {

	volatile struct vfc_regs __iomem *regs;

	struct vfc_regs *phys_regs;

	unsigned int control_reg;

	struct mutex device_lock_mtx;

	int instance;

	int busy;

	unsigned long which_io;

	unsigned char saa9051_state_array[VFC_SAA9051_NR];

};



void captstat_reset(struct vfc_dev *);

void memptr_reset(struct vfc_dev *);



int vfc_pcf8584_init(struct vfc_dev *);

void vfc_i2c_delay_no_busy(struct vfc_dev *, unsigned long);

void vfc_i2c_delay(struct vfc_dev *);

int vfc_i2c_sendbuf(struct vfc_dev *, unsigned char, char *, int) ;

int vfc_i2c_recvbuf(struct vfc_dev *, unsigned char, char *, int) ;

int vfc_i2c_reset_bus(struct vfc_dev *);

int vfc_init_i2c_bus(struct vfc_dev *);



#define VFC_CONTROL_DIAGMODE  0x10000000

#define VFC_CONTROL_MEMPTR    0x20000000

#define VFC_CONTROL_CAPTURE   0x02000000

#define VFC_CONTROL_CAPTRESET 0x04000000



#define VFC_STATUS_CAPTURE    0x08000000



#ifdef VFC_IOCTL_DEBUG

#define VFC_IOCTL_DEBUG_PRINTK(a) printk a

#else

#define VFC_IOCTL_DEBUG_PRINTK(a)

#endif



#ifdef VFC_I2C_DEBUG

#define VFC_I2C_DEBUG_PRINTK(a) printk a

#else

#define VFC_I2C_DEBUG_PRINTK(a)

#endif



#endif /* _LINUX_VFC_H_ */