Loading arch/arm/boot/dts/qcom/msm8996.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -3589,7 +3589,7 @@ &gdsc_mmagic_video { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading @@ -3597,7 +3597,7 @@ &gdsc_mmagic_mdss { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading @@ -3605,7 +3605,7 @@ &gdsc_mmagic_camss { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading drivers/clk/msm/clock-gcc-8996.c +0 −2 Original line number Diff line number Diff line Loading @@ -68,7 +68,6 @@ DEFINE_CLK_RPM_SMD(snoc_clk, snoc_a_clk, RPM_BUS_CLK_TYPE, SNOC_CLK_ID, NULL); DEFINE_CLK_RPM_SMD(mmssnoc_axi_clk, mmssnoc_axi_a_clk, RPM_MMAXI_CLK_TYPE, MMXI_CLK_ID, NULL); static DEFINE_CLK_VOTER(mmssnoc_gds_clk, &mmssnoc_axi_clk.c, LONG_MAX); DEFINE_CLK_RPM_SMD_BRANCH(aggre1_noc_clk, aggre1_noc_a_clk, RPM_AGGR_CLK_TYPE, AGGR1_NOC_ID, 1000); Loading Loading @@ -3345,7 +3344,6 @@ static struct clk_lookup msm_clocks_rpm_8996[] = { CLK_LIST(aggre2_noc_a_clk), CLK_LIST(mmssnoc_axi_clk), CLK_LIST(mmssnoc_axi_a_clk), CLK_LIST(mmssnoc_gds_clk), CLK_LIST(bb_clk1), CLK_LIST(bb_clk1_ao), CLK_LIST(bb_clk1_pin), Loading drivers/clk/msm/gdsc.c +3 −8 Original line number Diff line number Diff line Loading @@ -90,7 +90,6 @@ struct gdsc { bool force_root_en; int root_clk_idx; bool no_status_check_on_disable; bool is_gdsc_enabled; void __iomem *domain_addr; }; Loading Loading @@ -185,7 +184,7 @@ static int gdsc_enable(struct regulator_dev *rdev) if (sc->force_root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); sc->is_gdsc_enabled = true; return 0; } Loading Loading @@ -250,13 +249,9 @@ static int gdsc_disable(struct regulator_dev *rdev) sc->resets_asserted = true; } /* * Check if gdsc_enable was called for this GDSC. If not, the root * clock will not have been enabled prior to this. */ if ((sc->is_gdsc_enabled && sc->root_en) || sc->force_root_en) if (sc->root_en || sc->force_root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); sc->is_gdsc_enabled = false; return ret; } Loading include/dt-bindings/clock/msm-clocks-8996.h +0 −1 Original line number Diff line number Diff line Loading @@ -85,7 +85,6 @@ #define clk_aggre2_noc_a_clk 0xcab67089 #define clk_mmssnoc_axi_clk 0xdb4b31e6 #define clk_mmssnoc_axi_a_clk 0xd4970614 #define clk_mmssnoc_gds_clk 0x06a22afa #define clk_gpll0 0x1ebe3bc4 #define clk_gpll0_ao 0xa1368304 Loading Loading
arch/arm/boot/dts/qcom/msm8996.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -3589,7 +3589,7 @@ &gdsc_mmagic_video { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading @@ -3597,7 +3597,7 @@ &gdsc_mmagic_mdss { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading @@ -3605,7 +3605,7 @@ &gdsc_mmagic_camss { clock-names = "core_root_clk"; /* RPM enables the mmagic bimc GDSC when this clk node is voted for. */ clocks = <&clock_gcc clk_mmssnoc_gds_clk>; clocks = <&clock_gcc clk_mmssnoc_axi_clk>; qcom,enable-root-clk; status = "ok"; }; Loading
drivers/clk/msm/clock-gcc-8996.c +0 −2 Original line number Diff line number Diff line Loading @@ -68,7 +68,6 @@ DEFINE_CLK_RPM_SMD(snoc_clk, snoc_a_clk, RPM_BUS_CLK_TYPE, SNOC_CLK_ID, NULL); DEFINE_CLK_RPM_SMD(mmssnoc_axi_clk, mmssnoc_axi_a_clk, RPM_MMAXI_CLK_TYPE, MMXI_CLK_ID, NULL); static DEFINE_CLK_VOTER(mmssnoc_gds_clk, &mmssnoc_axi_clk.c, LONG_MAX); DEFINE_CLK_RPM_SMD_BRANCH(aggre1_noc_clk, aggre1_noc_a_clk, RPM_AGGR_CLK_TYPE, AGGR1_NOC_ID, 1000); Loading Loading @@ -3345,7 +3344,6 @@ static struct clk_lookup msm_clocks_rpm_8996[] = { CLK_LIST(aggre2_noc_a_clk), CLK_LIST(mmssnoc_axi_clk), CLK_LIST(mmssnoc_axi_a_clk), CLK_LIST(mmssnoc_gds_clk), CLK_LIST(bb_clk1), CLK_LIST(bb_clk1_ao), CLK_LIST(bb_clk1_pin), Loading
drivers/clk/msm/gdsc.c +3 −8 Original line number Diff line number Diff line Loading @@ -90,7 +90,6 @@ struct gdsc { bool force_root_en; int root_clk_idx; bool no_status_check_on_disable; bool is_gdsc_enabled; void __iomem *domain_addr; }; Loading Loading @@ -185,7 +184,7 @@ static int gdsc_enable(struct regulator_dev *rdev) if (sc->force_root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); sc->is_gdsc_enabled = true; return 0; } Loading Loading @@ -250,13 +249,9 @@ static int gdsc_disable(struct regulator_dev *rdev) sc->resets_asserted = true; } /* * Check if gdsc_enable was called for this GDSC. If not, the root * clock will not have been enabled prior to this. */ if ((sc->is_gdsc_enabled && sc->root_en) || sc->force_root_en) if (sc->root_en || sc->force_root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); sc->is_gdsc_enabled = false; return ret; } Loading
include/dt-bindings/clock/msm-clocks-8996.h +0 −1 Original line number Diff line number Diff line Loading @@ -85,7 +85,6 @@ #define clk_aggre2_noc_a_clk 0xcab67089 #define clk_mmssnoc_axi_clk 0xdb4b31e6 #define clk_mmssnoc_axi_a_clk 0xd4970614 #define clk_mmssnoc_gds_clk 0x06a22afa #define clk_gpll0 0x1ebe3bc4 #define clk_gpll0_ao 0xa1368304 Loading