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Commit 7e6897ee authored by Sandya Chikka's avatar Sandya Chikka Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Configure I2C node for msmthorium 



configure BLSP2QUP1 in I2C mode to enable communication
with the I2C slave devices.

Change-Id: I3f6409e917a7b95cda75d528a8bb8380f3857179
Signed-off-by: default avatarSandya Chikka <sandyachikka@codeaurora.org>
parent dc4c2ae8

arch/arm/boot/dts/qcom/msmthorium-pinctrl.dtsi

+30 −0
Original line number Diff line number Diff line
@@ -79,5 +79,35 @@ 
				};

			};

		};



		i2c5 {

			i2c5_default: i2c5_default {

				/* active state */

				mux {

					pins = "gpio18", "gpio19";

					function = "blsp_i2c5";

				};



				config {

					pins = "gpio18", "gpio19";

					drive-strength = <2>;

					bias-disable;

				};

			};



			i2c5_sleep: i2c5_sleep {

				/* suspended state */

				mux {

					pins = "gpio18", "gpio19";

					function = "gpio";

				};



				config {

					pins = "gpio18", "gpio19";

					drive-strength = <2>;

					bias-pull-down;

				};

			};

		};

	};

};

arch/arm/boot/dts/qcom/msmthorium.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ 
		smd21 = &smdtty_data21;

		smd36 = &smdtty_loopback;

		i2c2 = &i2c_2;

		i2c5 = &i2c_5;

	};



	soc: soc { };
@@ -244,6 +245,31 @@ 
		dma-names = "tx", "rx";

	};



	i2c_5: i2c@7af5000 { /* BLSP2 QUP1 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "qup_phys_addr";

		reg = <0x7af5000 0x600>;

		interrupt-names = "qup_irq";

		interrupts = <0 299 0>;

		qcom,clk-freq-out = <400000>;

		qcom,clk-freq-in  = <19200000>;

		clock-names = "iface_clk", "core_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,

			<&clock_gcc clk_gcc_blsp2_qup1_i2c_apps_clk>;



		pinctrl-names = "i2c_default", "i2c_sleep";

		pinctrl-0 = <&i2c5_default>;

		pinctrl-1 = <&i2c5_sleep>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

		qcom,master-id = <86>;

		dmas = <&dma_blsp2 4 64 0x20000020 0x20>,

			<&dma_blsp2 5 32 0x20000020 0x20>;

		dma-names = "tx", "rx";

	};



	clock_gcc: qcom,gcc {

		compatible = "qcom,dummycc";

		#clock-cells = <1>;