Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7e5a69e8 authored by Nicolas Pitre's avatar Nicolas Pitre Committed by Russell King
Browse files

ARM: 6007/1: fix highmem with VIPT cache and DMA 



The VIVT cache of a highmem page is always flushed before the page
is unmapped.  This cache flush is explicit through flush_cache_kmaps()
in flush_all_zero_pkmaps(), or through __cpuc_flush_dcache_area() in
kunmap_atomic().  There is also an implicit flush of those highmem pages
that were part of a process that just terminated making those pages free
as the whole VIVT cache has to be flushed on every task switch. Hence
unmapped highmem pages need no cache maintenance in that case.

However unmapped pages may still be cached with a VIPT cache because the
cache is tagged with physical addresses.  There is no need for a whole
cache flush during task switching for that reason, and despite the
explicit cache flushes in flush_all_zero_pkmaps() and kunmap_atomic(),
some highmem pages that were mapped in user space end up still cached
even when they become unmapped.

So, we do have to perform cache maintenance on those unmapped highmem
pages in the context of DMA when using a VIPT cache.  Unfortunately,
it is not possible to perform that cache maintenance using physical
addresses as all the L1 cache maintenance coprocessor functions accept
virtual addresses only.  Therefore we have no choice but to set up a
temporary virtual mapping for that purpose.

And of course the explicit cache flushing when unmapping a highmem page
on a system with a VIPT cache now can go, which should increase
performance.

While at it, because the code in __flush_dcache_page() has to be modified
anyway, let's also make sure the mapped highmem pages are pinned with
kmap_high_get() for the duration of the cache maintenance operation.
Because kunmap() does unmap highmem pages lazily, it was reported by
Gary King <GKing@nvidia.com> that those pages ended up being unmapped
during cache maintenance on SMP causing segmentation faults.

Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 317aa408

arch/arm/include/asm/highmem.h

+14 −1
Original line number Diff line number Diff line
@@ -11,7 +11,11 @@ 


#define kmap_prot		PAGE_KERNEL



#define flush_cache_kmaps()	flush_cache_all()

#define flush_cache_kmaps() \

	do { \

		if (cache_is_vivt()) \

			flush_cache_all(); \

	} while (0)



extern pte_t *pkmap_page_table;
@@ -21,11 +25,20 @@ extern void *kmap_high(struct page *page); 
extern void *kmap_high_get(struct page *page);

extern void kunmap_high(struct page *page);



extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte);

extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte);



/*

 * The following functions are already defined by <linux/highmem.h>

 * when CONFIG_HIGHMEM is not set.

 */

#ifdef CONFIG_HIGHMEM

extern void *kmap(struct page *page);

extern void kunmap(struct page *page);

extern void *kmap_atomic(struct page *page, enum km_type type);

extern void kunmap_atomic(void *kvaddr, enum km_type type);

extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);

extern struct page *kmap_atomic_to_page(const void *ptr);

#endif



#endif

arch/arm/include/asm/kmap_types.h

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ enum km_type { 
	KM_IRQ1,

	KM_SOFTIRQ0,

	KM_SOFTIRQ1,

	KM_L1_CACHE,

	KM_L2_CACHE,

	KM_TYPE_NR

};

arch/arm/mm/copypage-v6.c

+1 −8
Original line number Diff line number Diff line
@@ -41,13 +41,6 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to, 
	kfrom = kmap_atomic(from, KM_USER0);

	kto = kmap_atomic(to, KM_USER1);

	copy_page(kto, kfrom);

#ifdef CONFIG_HIGHMEM

	/*

	 * kmap_atomic() doesn't set the page virtual address, and

	 * kunmap_atomic() takes care of cache flushing already.

	 */

	if (page_address(to) != NULL)

#endif

	__cpuc_flush_dcache_area(kto, PAGE_SIZE);

	kunmap_atomic(kto, KM_USER1);

	kunmap_atomic(kfrom, KM_USER0);

arch/arm/mm/dma-mapping.c

+5 −0
Original line number Diff line number Diff line
@@ -464,6 +464,11 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset, 
				vaddr += offset;

				op(vaddr, len, dir);

				kunmap_high(page);

			} else if (cache_is_vipt()) {

				pte_t saved_pte;

				vaddr = kmap_high_l1_vipt(page, &saved_pte);

				op(vaddr + offset, len, dir);

				kunmap_high_l1_vipt(page, saved_pte);

			}

		} else {

			vaddr = page_address(page) + offset;

arch/arm/mm/flush.c

+15 −10
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 


#include <asm/cacheflush.h>

#include <asm/cachetype.h>

#include <asm/highmem.h>

#include <asm/smp_plat.h>

#include <asm/system.h>

#include <asm/tlbflush.h>
@@ -152,21 +153,25 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 


void __flush_dcache_page(struct address_space *mapping, struct page *page)

{

	void *addr = page_address(page);



	/*

	 * Writeback any data associated with the kernel mapping of this

	 * page.  This ensures that data in the physical page is mutually

	 * coherent with the kernels mapping.

	 */

#ifdef CONFIG_HIGHMEM

	/*

	 * kmap_atomic() doesn't set the page virtual address, and

	 * kunmap_atomic() takes care of cache flushing already.

	 */

	if (addr)

#endif

	if (!PageHighMem(page)) {

		__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);

	} else {

		void *addr = kmap_high_get(page);

		if (addr) {

			__cpuc_flush_dcache_area(addr, PAGE_SIZE);

			kunmap_high(page);

		} else if (cache_is_vipt()) {

			pte_t saved_pte;

			addr = kmap_high_l1_vipt(page, &saved_pte);

			__cpuc_flush_dcache_area(addr, PAGE_SIZE);

			kunmap_high_l1_vipt(page, saved_pte);

		}

	}



	/*

	 * If this is a page cache page, and we have an aliasing VIPT cache,