Merge "ARM: dts: msm: Add qnand_1 device node for APQ8009" (7d82880e) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/mtd/msm_qpic_nand.txt

+7 −2

Original line number	Diff line number	Diff line
		@@ -19,6 +19,9 @@ This is now completely optional as the partition information is avaialble from
		bootloader.

		Optional properties:
		- reg : boot_cfg. This is needed only on the targets where both NAND and eMMC
		devices are supported. On eMMC based builds, NAND cannot be enabled by
		default due to the absence of some of its required resources.
		- reg : The partition offset and size
		- label : The label / name for this partition.
		- read-only: This parameter, if present, indicates that this partition
		@@ -36,9 +39,11 @@ Examples:
		qcom,nand@f9af0000 {
		compatible = "qcom,msm-nand";
		reg = <0xf9af0000 0x1000>,
		<0xf9ac4000 0x8000>;
		<0xf9ac4000 0x8000>,
		<0x5e02c 0x4>;
		reg-names = "nand_phys",
		"bam_phys";
		"bam_phys",
		"boot_cfg";
		qcom,reg-adjustment-offset = <0x4000>;

		interrupts = <0 279 0>;

+5 −1

Original line number	Diff line number	Diff line
		/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -300,6 +300,10 @@
		status = "okay";
		};

		&qnand_1 {
		status = "ok";
		};

		&sdhc_1 {
		vdd-supply = <&pm8909_l8>;
		qcom,vdd-voltage-level = <2900000 2900000>;

+25 −0

Original line number	Diff line number	Diff line
		@@ -48,6 +48,7 @@
		i2c1 = &i2c_1; /* I2C1 controller */
		i2c2 = &i2c_2; /* I2C2 NFC qup2 device */
		i2c4 = &i2c_4; /* I2C4 controller device */
		qpic_nand1 = &qnand_1; /* qpic nand controller */
		};

		cpus {
		@@ -950,6 +951,30 @@
		qcom,coresight-jtagmm-cpu = <&CPU3>;
		};

		qnand_1: nand@7980000 {
		compatible = "qcom,msm-nand";
		reg = <0x7980000 0x1000>,
		<0x7984000 0x1a000>,
		<0x5e02c 0x4>;
		reg-names = "nand_phys",
		"bam_phys", "boot_cfg";
		qcom,reg-adjustment-offset = <0>;
		interrupts = <0 132 0>;
		interrupt-names = "bam_irq";

		qcom,msm-bus,name = "qpic_nand";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		<91 512 0 0>,
		/* Voting for max b/w on PNOC bus for now */
		<91 512 400000 800000>;

		clock-names = "core_clk";
		clocks = <&clock_rpm clk_qpic_clk>;
		status = "disabled";
		};

		sdhc_1: sdhci@7824000 {
		compatible = "qcom,sdhci-msm";
		reg = <0x07824900 0x11c>, <0x07824000 0x800>;

+23 −0

Original line number	Diff line number	Diff line
		@@ -3348,6 +3348,9 @@ static int msm_nand_parse_smem_ptable(int *nr_parts)
		}
		#endif

		#define BOOT_DEV_MASK 0x1E
		#define BOOT_DEV_NAND 0x4

		/*
		* This function gets called when its device named msm-nand is added to
		* device tree .dts file with all its resources such as physical addresses
		@@ -3365,6 +3368,26 @@ static int msm_nand_probe(struct platform_device *pdev)
		int i, err, nr_parts;
		struct device *dev;
		u32 adjustment_offset;
		void __iomem *boot_cfg_base;
		u32 boot_dev;

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"boot_cfg");
		if (res && res->start) {
		boot_cfg_base = devm_ioremap(&pdev->dev, res->start,
		resource_size(res));
		if (!boot_cfg_base) {
		pr_err("ioremap() failed for addr 0x%x size 0x%x\n",
		res->start, resource_size(res));
		return -ENOMEM;
		}
		boot_dev = (readl_relaxed(boot_cfg_base) & BOOT_DEV_MASK) >> 1;
		if (boot_dev != BOOT_DEV_NAND) {
		pr_err("disabling nand as boot device (%x) is not NAND\n",
		boot_dev);
		return -ENODEV;
		}
		}
		/*
		* The partition information can also be passed from kernel command
		* line. Also, the MTD core layer supports adding the whole device as