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Commit 7d6ab9b8 authored by Rob Herring's avatar Rob Herring
Browse files

ARM: dts: Add Calxeda ECX-2000 support 



Separate out common dts pieces from highbank dts and add support for
Calxeda ECX-2000 (Midway) SOC.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 185bdffb

Documentation/devicetree/bindings/arm/calxeda.txt

+10 −3
Original line number Diff line number Diff line 
Calxeda Highbank Platforms Device Tree Bindings

Calxeda Platforms Device Tree Bindings

-----------------------------------------------



Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following

properties.

Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the

following properties.



Required root node properties:

    - compatible = "calxeda,highbank";





Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following

properties.



Required root node properties:

    - compatible = "calxeda,ecx-2000";

arch/arm/boot/dts/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -24,7 +24,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ 
	exynos4210-smdkv310.dtb \

	exynos4210-trats.dtb \

	exynos5250-smdk5250.dtb

dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb

dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \

	ecx-2000.dtb

dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \

	integratorcp.dtb

dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb

arch/arm/boot/dts/ecx-2000.dts

0 → 100644
+104 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2011-2012 Calxeda, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 */



/dts-v1/;



/* First 4KB has pen for secondary cores. */

/memreserve/ 0x00000000 0x0001000;



/ {

	model = "Calxeda ECX-2000";

	compatible = "calxeda,ecx-2000";

	#address-cells = <2>;

	#size-cells = <2>;

	clock-ranges;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			compatible = "arm,cortex-a15";

			reg = <0>;

			clocks = <&a9pll>;

			clock-names = "cpu";

		};



		cpu@1 {

			compatible = "arm,cortex-a15";

			reg = <1>;

			clocks = <&a9pll>;

			clock-names = "cpu";

		};



		cpu@2 {

			compatible = "arm,cortex-a15";

			reg = <2>;

			clocks = <&a9pll>;

			clock-names = "cpu";

		};



		cpu@3 {

			compatible = "arm,cortex-a15";

			reg = <3>;

			clocks = <&a9pll>;

			clock-names = "cpu";

		};

	};



	memory@0 {

		name = "memory";

		device_type = "memory";

		reg = <0x00000000 0x00000000 0x00000000 0xff800000>;

	};



	memory@200000000 {

		name = "memory";

		device_type = "memory";

		reg = <0x00000002 0x00000000 0x00000003 0x00000000>;

	};



	soc {

		ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;



		timer {

			compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; 			interrupts = <1 13 0xf08>,

				<1 14 0xf08>,

				<1 11 0xf08>,

				<1 10 0xf08>;

		};



		intc: interrupt-controller@fff11000 {

			compatible = "arm,cortex-a15-gic";

			#interrupt-cells = <3>;

			#size-cells = <0>;

			#address-cells = <1>;

			interrupt-controller;

			interrupts = <1 9 0xf04>;

			reg = <0xfff11000 0x1000>,

			      <0xfff12000 0x1000>,

			      <0xfff14000 0x2000>,

			      <0xfff16000 0x2000>;

		};



		pmu {

			compatible = "arm,cortex-a9-pmu";

			interrupts = <0 76 4  0 75 4  0 74 4  0 73 4>;

		};

	};

};



/include/ "ecx-common.dtsi"

arch/arm/boot/dts/ecx-common.dtsi

0 → 100644
+237 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2011-2012 Calxeda, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 */



/ {

	chosen {

		bootargs = "console=ttyAMA0";

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "simple-bus";

		interrupt-parent = <&intc>;



		sata@ffe08000 {

			compatible = "calxeda,hb-ahci";

			reg = <0xffe08000 0x10000>;

			interrupts = <0 83 4>;

			dma-coherent;

			calxeda,port-phys = <&combophy5 0 &combophy0 0

					     &combophy0 1 &combophy0 2

					     &combophy0 3>;

		};



		sdhci@ffe0e000 {

			compatible = "calxeda,hb-sdhci";

			reg = <0xffe0e000 0x1000>;

			interrupts = <0 90 4>;

			clocks = <&eclk>;

			status = "disabled";

		};



		memory-controller@fff00000 {

			compatible = "calxeda,hb-ddr-ctrl";

			reg = <0xfff00000 0x1000>;

			interrupts = <0 91 4>;

		};



		ipc@fff20000 {

			compatible = "arm,pl320", "arm,primecell";

			reg = <0xfff20000 0x1000>;

			interrupts = <0 7 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		gpioe: gpio@fff30000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff30000 0x1000>;

			interrupts = <0 14 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpiof: gpio@fff31000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff31000 0x1000>;

			interrupts = <0 15 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpiog: gpio@fff32000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff32000 0x1000>;

			interrupts = <0 16 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpioh: gpio@fff33000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff33000 0x1000>;

			interrupts = <0 17 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		timer@fff34000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0xfff34000 0x1000>;

			interrupts = <0 18 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		rtc@fff35000 {

			compatible = "arm,pl031", "arm,primecell";

			reg = <0xfff35000 0x1000>;

			interrupts = <0 19 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		serial@fff36000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xfff36000 0x1000>;

			interrupts = <0 20 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		smic@fff3a000 {

			compatible = "ipmi-smic";

			device_type = "ipmi";

			reg = <0xfff3a000 0x1000>;

			interrupts = <0 24 4>;

			reg-size = <4>;

			reg-spacing = <4>;

		};



		sregs@fff3c000 {

			compatible = "calxeda,hb-sregs";

			reg = <0xfff3c000 0x1000>;



			clocks {

				#address-cells = <1>;

				#size-cells = <0>;



				osc: oscillator {

					#clock-cells = <0>;

					compatible = "fixed-clock";

					clock-frequency = <33333000>;

				};



				ddrpll: ddrpll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x108>;

				};



				a9pll: a9pll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x100>;

				};



				a9periphclk: a9periphclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-a9periph-clock";

					clocks = <&a9pll>;

					reg = <0x104>;

				};



				a9bclk: a9bclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-a9bus-clock";

					clocks = <&a9pll>;

					reg = <0x104>;

				};



				emmcpll: emmcpll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x10C>;

				};



				eclk: eclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-emmc-clock";

					clocks = <&emmcpll>;

					reg = <0x114>;

				};



				pclk: pclk {

					#clock-cells = <0>;

					compatible = "fixed-clock";

					clock-frequency = <150000000>;

				};

			};

		};



		dma@fff3d000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0xfff3d000 0x1000>;

			interrupts = <0 92 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		ethernet@fff50000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff50000 0x1000>;

			interrupts = <0 77 4  0 78 4  0 79 4>;

			dma-coherent;

		};



		ethernet@fff51000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff51000 0x1000>;

			interrupts = <0 80 4  0 81 4  0 82 4>;

			dma-coherent;

		};



		combophy0: combo-phy@fff58000 {

			compatible = "calxeda,hb-combophy";

			#phy-cells = <1>;

			reg = <0xfff58000 0x1000>;

			phydev = <5>;

		};



		combophy5: combo-phy@fff5d000 {

			compatible = "calxeda,hb-combophy";

			#phy-cells = <1>;

			reg = <0xfff5d000 0x1000>;

			phydev = <31>;

		};

	};

};

arch/arm/boot/dts/highbank.dts

+3 −216
Original line number Diff line number Diff line
@@ -69,16 +69,8 @@ 
		reg = <0x00000000 0xff900000>;

	};



	chosen {

		bootargs = "console=ttyAMA0";

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "simple-bus";

		interrupt-parent = <&intc>;

		ranges;

		ranges = <0x00000000 0x00000000 0xffffffff>;



		timer@fff10600 {

			compatible = "arm,cortex-a9-twd-timer";
@@ -117,178 +109,6 @@ 
			interrupts = <0 76 4  0 75 4  0 74 4  0 73 4>;

		};



		sata@ffe08000 {

			compatible = "calxeda,hb-ahci";

			reg = <0xffe08000 0x10000>;

			interrupts = <0 83 4>;

			calxeda,port-phys = <&combophy5 0 &combophy0 0

					     &combophy0 1 &combophy0 2

					     &combophy0 3>;

			dma-coherent;

		};



		sdhci@ffe0e000 {

			compatible = "calxeda,hb-sdhci";

			reg = <0xffe0e000 0x1000>;

			interrupts = <0 90 4>;

			clocks = <&eclk>;

			status = "disabled";

		};



		memory-controller@fff00000 {

			compatible = "calxeda,hb-ddr-ctrl";

			reg = <0xfff00000 0x1000>;

			interrupts = <0 91 4>;

		};



		ipc@fff20000 {

			compatible = "arm,pl320", "arm,primecell";

			reg = <0xfff20000 0x1000>;

			interrupts = <0 7 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		gpioe: gpio@fff30000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff30000 0x1000>;

			interrupts = <0 14 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpiof: gpio@fff31000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff31000 0x1000>;

			interrupts = <0 15 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpiog: gpio@fff32000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff32000 0x1000>;

			interrupts = <0 16 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		gpioh: gpio@fff33000 {

			#gpio-cells = <2>;

			compatible = "arm,pl061", "arm,primecell";

			gpio-controller;

			reg = <0xfff33000 0x1000>;

			interrupts = <0 17 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

			status = "disabled";

		};



		timer {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0xfff34000 0x1000>;

			interrupts = <0 18 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		rtc@fff35000 {

			compatible = "arm,pl031", "arm,primecell";

			reg = <0xfff35000 0x1000>;

			interrupts = <0 19 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		serial@fff36000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xfff36000 0x1000>;

			interrupts = <0 20 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		smic@fff3a000 {

			compatible = "ipmi-smic";

			device_type = "ipmi";

			reg = <0xfff3a000 0x1000>;

			interrupts = <0 24 4>;

			reg-size = <4>;

			reg-spacing = <4>;

		};



		sregs@fff3c000 {

			compatible = "calxeda,hb-sregs";

			reg = <0xfff3c000 0x1000>;



			clocks {

				#address-cells = <1>;

				#size-cells = <0>;



				osc: oscillator {

					#clock-cells = <0>;

					compatible = "fixed-clock";

					clock-frequency = <33333000>;

				};



				ddrpll: ddrpll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x108>;

				};



				a9pll: a9pll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x100>;

				};



				a9periphclk: a9periphclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-a9periph-clock";

					clocks = <&a9pll>;

					reg = <0x104>;

				};



				a9bclk: a9bclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-a9bus-clock";

					clocks = <&a9pll>;

					reg = <0x104>;

				};



				emmcpll: emmcpll {

					#clock-cells = <0>;

					compatible = "calxeda,hb-pll-clock";

					clocks = <&osc>;

					reg = <0x10C>;

				};



				eclk: eclk {

					#clock-cells = <0>;

					compatible = "calxeda,hb-emmc-clock";

					clocks = <&emmcpll>;

					reg = <0x114>;

				};



				pclk: pclk {

					#clock-cells = <0>;

					compatible = "fixed-clock";

					clock-frequency = <150000000>;

				};

			};

		};



		sregs@fff3c200 {

			compatible = "calxeda,hb-sregs-l2-ecc";
@@ -296,40 +116,7 @@ 
			interrupts = <0 71 4  0 72 4>;

		};



		dma@fff3d000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0xfff3d000 0x1000>;

			interrupts = <0 92 4>;

			clocks = <&pclk>;

			clock-names = "apb_pclk";

		};



		ethernet@fff50000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff50000 0x1000>;

			interrupts = <0 77 4  0 78 4  0 79 4>;

			dma-coherent;

		};



		ethernet@fff51000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff51000 0x1000>;

			interrupts = <0 80 4  0 81 4  0 82 4>;

			dma-coherent;

	};



		combophy0: combo-phy@fff58000 {

			compatible = "calxeda,hb-combophy";

			#phy-cells = <1>;

			reg = <0xfff58000 0x1000>;

			phydev = <5>;

};



		combophy5: combo-phy@fff5d000 {

			compatible = "calxeda,hb-combophy";

			#phy-cells = <1>;

			reg = <0xfff5d000 0x1000>;

			phydev = <31>;

		};

	};

};
 
/include/ "ecx-common.dtsi"