msm: mdss: enable pll regulator during phy config

Make sure to enable the pll digital block during phy on sequence.
This fixes some corruption observed as part of resume for cmd mode
dual dsi panel, where panel does not support phy power off during suspend.

Change-Id: I246917fc06e9fe79a952fe28296de3813a2e2081
Signed-off-by: Raghavendra Ambadas <rambad@codeaurora.org>