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Commit 7caa4fd2 authored by Huang Shijie's avatar Huang Shijie Committed by Brian Norris
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mtd: gpmi: imx6: fix the wrong method for checking ready/busy



In the imx6, all the ready/busy pins are binding togeter.
So we should always check the ready/busy pin of the chip 0.

In the other word, when the CS1 is enabled, we should also check the
ready/busy of chip 0; if we check the ready/busy of chip 1,
we will get the wrong result.

Signed-off-by: default avatarHuang Shijie <b32955@freescale.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent a5370e9e
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+7 −0
Original line number Original line Diff line number Diff line
@@ -1079,6 +1079,13 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip)
		mask = MX23_BM_GPMI_DEBUG_READY0 << chip;
		mask = MX23_BM_GPMI_DEBUG_READY0 << chip;
		reg = readl(r->gpmi_regs + HW_GPMI_DEBUG);
		reg = readl(r->gpmi_regs + HW_GPMI_DEBUG);
	} else if (GPMI_IS_MX28(this) || GPMI_IS_MX6Q(this)) {
	} else if (GPMI_IS_MX28(this) || GPMI_IS_MX6Q(this)) {
		/*
		 * In the imx6, all the ready/busy pins are bound
		 * together. So we only need to check chip 0.
		 */
		if (GPMI_IS_MX6Q(this))
			chip = 0;

		/* MX28 shares the same R/B register as MX6Q. */
		/* MX28 shares the same R/B register as MX6Q. */
		mask = MX28_BF_GPMI_STAT_READY_BUSY(1 << chip);
		mask = MX28_BF_GPMI_STAT_READY_BUSY(1 << chip);
		reg = readl(r->gpmi_regs + HW_GPMI_STAT);
		reg = readl(r->gpmi_regs + HW_GPMI_STAT);