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Commit 7a880974 authored by Viraja Kommaraju's avatar Viraja Kommaraju Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add pinctrl configs for MI2S/AUXPCM modes for MDM9650 



Add gpio configurations for each mode of MI2S/AUXPCM in pinctrl
dtsi. Define corresponding pinctrl states in MDM9650 dtsi
and add the handles in sound node.

Change-Id: I015631ebcf7d61996fef89cdbe5a95b1896122d4
CRs-fixed: 2029897
Signed-off-by: default avatarViraja Kommaraju <virajak@codeaurora.org>
parent 38ee35a9

arch/arm/boot/dts/qcom/mdm9650-pinctrl.dtsi

+72 −21
Original line number Diff line number Diff line
@@ -735,8 +735,8 @@ 


		};



		pmx_pri_mi2s_dout {

			pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {

		pmx_pri_mi2s_aux {

			pri_ws_sleep: pri_ws_sleep {

				mux {

					pins = "gpio12";

					function = "gpio";
@@ -750,7 +750,7 @@ 
				};

			};



			pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {

			pri_sck_sleep: pri_sck_sleep {

				mux {

					pins = "gpio15";

					function = "gpio";
@@ -764,7 +764,7 @@ 
				};

			};



			pri_mi2s_dout_sleep: pri_mi2s_dout_sleep {

			pri_dout_sleep: pri_dout_sleep {

				mux {

					pins = "gpio14";

					function = "gpio";
@@ -778,7 +778,7 @@ 
				};

			};



			pri_mi2s_ws_active: pri_mi2s_ws_active {

			pri_ws_active_master: pri_ws_active_master {

				mux {

					pins = "gpio12";

					function = "pri_mi2s_ws_a";
@@ -792,7 +792,7 @@ 
				};

			};



			pri_mi2s_sck_active: pri_mi2s_sck_active {

			pri_sck_active_master: pri_sck_active_master {

				mux {

					pins = "gpio15";

					function = "pri_mi2s_sck_a";
@@ -806,7 +806,33 @@ 
				};

			};



			pri_mi2s_dout_active: pri_mi2s_dout_active {

			pri_ws_active_slave: pri_ws_active_slave {

				mux {

					pins = "gpio12";

					function = "pri_mi2s_ws_a";

				};



				config {

					pins = "gpio12";

					drive-strength = <8>;	/* 8 mA */

					bias-disable;		/* NO PULL*/

				};

			};



			pri_sck_active_slave: pri_sck_active_slave {

				mux {

					pins = "gpio15";

					function = "pri_mi2s_sck_a";

				};



				config {

					pins = "gpio15";

					drive-strength = <8>;	/* 8 mA */

					bias-disable;		/* NO PULL*/

				};

			};



			pri_dout_active: pri_dout_active {

				mux {

					pins = "gpio14";

					function = "pri_mi2s_data1_a";
@@ -821,8 +847,8 @@ 
			};

		};



		pmx_pri_mi2s_din {

			pri_mi2s_din_sleep: pri_mi2s_din_sleep {

		pmx_pri_mi2s_aux_din {

			pri_din_sleep: pri_din_sleep {

				mux {

					pins = "gpio13";

					function = "gpio";
@@ -836,7 +862,7 @@ 
				};

			};



			pri_mi2s_din_active: pri_mi2s_din_active {

			pri_din_active: pri_din_active {

				mux {

					pins = "gpio13";

					function = "pri_mi2s_data0_a";
@@ -850,8 +876,8 @@ 
			};

		};



		pmx_sec_mi2s_dout {

			sec_mi2s_ws_sleep: sec_mi2s_ws_sleep {

		pmx_sec_mi2s_aux {

			sec_ws_sleep: sec_ws_sleep {

				mux {

					pins = "gpio16";

					function = "gpio";
@@ -865,7 +891,7 @@ 
				};

			};



			sec_mi2s_sck_sleep: sec_mi2s_sck_sleep {

			sec_sck_sleep: sec_sck_sleep {

				mux {

					pins = "gpio19";

					function = "gpio";
@@ -879,7 +905,7 @@ 
				};

			};



			sec_mi2s_dout_sleep: sec_mi2s_dout_sleep {

			sec_dout_sleep: sec_dout_sleep {

				mux {

					pins = "gpio18";

					function = "gpio";
@@ -893,7 +919,7 @@ 
				};

			};



			sec_mi2s_ws_active: sec_mi2s_ws_active {

			sec_ws_active_master: sec_ws_active_master {

				mux {

					pins = "gpio16";

					function = "sec_mi2s_ws_a";
@@ -907,7 +933,7 @@ 
				};

			};



			sec_mi2s_sck_active: sec_mi2s_sck_active {

			sec_sck_active_master: sec_sck_active_master {

				mux {

					pins = "gpio19";

					function = "sec_mi2s_sck_a";
@@ -921,7 +947,33 @@ 
				};

			};



			sec_mi2s_dout_active: sec_mi2s_dout_active {

			sec_ws_active_slave: sec_ws_active_slave {

				mux {

					pins = "gpio16";

					function = "sec_mi2s_ws_a";

				};



				config {

					pins = "gpio16";

					drive-strength = <8>;	/* 8 mA */

					bias-disable;		/* NO PULL*/

				};

			};



			sec_sck_active_slave: sec_sck_active_slave {

				mux {

					pins = "gpio19";

					function = "sec_mi2s_sck_a";

				};



				config {

					pins = "gpio19";

					drive-strength = <8>;	/* 8 mA */

					bias-disable;		/* NO PULL*/

				};

			};



			sec_dout_active: sec_dout_active {

				mux {

					pins = "gpio18";

					function = "sec_mi2s_data1_a";
@@ -936,8 +988,8 @@ 
			};

		};



		pmx_sec_mi2s_din {

			sec_mi2s_din_sleep: sec_mi2s_din_sleep {

		pmx_sec_mi2s_aux_din {

			sec_din_sleep: sec_din_sleep {

				mux {

					pins = "gpio17";

					function = "gpio";
@@ -951,7 +1003,7 @@ 
				};

			};



			sec_mi2s_din_active: sec_mi2s_din_active {

			sec_din_active: sec_din_active {

				mux {

					pins = "gpio17";

					function = "sec_mi2s_data0_a";
@@ -961,7 +1013,6 @@ 
					pins = "gpio17";

					drive-strength = <8>;	/* 8 mA */

					bias-disable;		/* NO PULL */

					output-high;

				};

			};

		};

arch/arm/boot/dts/qcom/mdm9650.dtsi

+62 −17
Original line number Diff line number Diff line
@@ -1134,8 +1134,10 @@ 
			"SpkrRight IN", "SPK2 OUT";



		qcom,tasha-mclk-clk-freq = <12288000>;

		qcom,mi2s-interface-mode = "pri_mi2s_master", "sec_mi2s_master";

		qcom,auxpcm-interface-mode = "pri_pcm_master", "sec_pcm_master";

		qcom,prim_mi2s_aux_master = <&prim_master>;

		qcom,prim_mi2s_aux_slave = <&prim_slave>;

		qcom,sec_mi2s_aux_master = <&sec_master>;

		qcom,sec_mi2s_aux_slave = <&sec_slave>;

		asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,

				<&loopback>, <&hostless>, <&afe>, <&routing>,

				<&pcm_dtmf>, <&host_pcm>, <&compress>;
@@ -1320,6 +1322,7 @@ 
		qcom,msm-cpudai-auxpcm-data = <0>, <0>;

		qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;

		qcom,msm-auxpcm-interface = "primary";

		qcom,msm-cpudai-afe-clk-ver = <2>;

	};



	dai_sec_auxpcm: qcom,msm-sec-auxpcm {
@@ -1333,11 +1336,7 @@ 
		qcom,msm-cpudai-auxpcm-data = <0>, <0>;

		qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;

		qcom,msm-auxpcm-interface = "secondary";

		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&sec_mi2s_ws_active &sec_mi2s_sck_active

			     &sec_mi2s_dout_active &sec_mi2s_din_active>;

		pinctrl-1 = <&sec_mi2s_ws_sleep &sec_mi2s_sck_sleep

			     &sec_mi2s_dout_sleep &sec_mi2s_din_sleep>;

		qcom,msm-cpudai-afe-clk-ver = <2>;

	};



	qcom,msm-dai-mi2s {
@@ -1347,17 +1346,7 @@ 
			qcom,msm-dai-q6-mi2s-dev-id = <0>;

			qcom,msm-mi2s-rx-lines = <2>;

			qcom,msm-mi2s-tx-lines = <1>;

			pinctrl-names = "default", "idle";

			pinctrl-0 = <&pri_mi2s_ws_active

				     &pri_mi2s_sck_active

				     &pri_mi2s_dout_active>,

				    <&pri_mi2s_din_active>;

			pinctrl-1 = <&pri_mi2s_ws_sleep

				     &pri_mi2s_sck_sleep

				     &pri_mi2s_dout_sleep>,

				    <&pri_mi2s_din_sleep>;

		};



		mi2s_sec: qcom,msm-dai-q6-mi2s-sec {

			compatible = "qcom,msm-dai-q6-mi2s";

			qcom,msm-dai-q6-mi2s-dev-id = <1>;
@@ -1367,6 +1356,62 @@ 


	};



	prim_master: prim_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_master

				&pri_sck_active_master

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	prim_slave: prim_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_slave

				&pri_sck_active_slave

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	sec_master: sec_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_master

				&sec_sck_active_master

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	sec_slave: sec_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_slave

				&sec_sck_active_slave

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	sdhc_1: sdhci@7824000 {

		compatible = "qcom,sdhci-msm";

		reg = <0x07824900 0x500>, <0x07824000 0x800>;