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Commit 7a5c3b8c authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Merge branch 'next/alchemy' into mips-for-linux-next

parents 39b74143 2af99920

arch/mips/alchemy/Kconfig

+13 −47
Original line number Original line Diff line number Diff line
@@ -2,6 +2,10 @@ 
config ALCHEMY_GPIOINT_AU1000

config ALCHEMY_GPIOINT_AU1000

	bool

	bool





# au1300-style GPIO/INT controller

config ALCHEMY_GPIOINT_AU1300

	bool



# select this in your board config if you don't want to use the gpio

# select this in your board config if you don't want to use the gpio

# namespace as documented in the manuals.  In this case however you need

# namespace as documented in the manuals.  In this case however you need

# to create the necessary gpio_* functions in your board code/headers!

# to create the necessary gpio_* functions in your board code/headers!
@@ -22,43 +26,29 @@ config MIPS_MTX1 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK





config MIPS_BOSPORUS

	bool "Alchemy Bosporus board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_DB1000

config MIPS_DB1000

	bool "Alchemy DB1000 board"

	bool "Alchemy DB1000/DB1500/DB1100 boards"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select HW_HAS_PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_HAS_EARLY_PRINTK

	select SYS_SUPPORTS_BIG_ENDIAN



config MIPS_DB1100

	bool "Alchemy DB1100 board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK





config MIPS_DB1200

config MIPS_DB1200

	bool "Alchemy DB1200 board"

	bool "Alchemy DB1200/PB1200 board"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1000

	select DMA_COHERENT

	select DMA_COHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK





config MIPS_DB1500

config MIPS_DB1300

	bool "Alchemy DB1500 board"

	bool "NetLogic DB1300 board"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1300

	select DMA_NONCOHERENT

	select DMA_COHERENT

	select HW_HAS_PCI

	select MIPS_DISABLE_OBSOLETE_IDE

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK
@@ -66,27 +56,11 @@ config MIPS_DB1550 
	bool "Alchemy DB1550 board"

	bool "Alchemy DB1550 board"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1000

	select HW_HAS_PCI

	select HW_HAS_PCI

	select DMA_NONCOHERENT

	select DMA_COHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK





config MIPS_MIRAGE

	bool "Alchemy Mirage board"

	select DMA_NONCOHERENT

	select ALCHEMY_GPIOINT_AU1000

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_PB1000

	bool "Alchemy PB1000 board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select SWAP_IO_SPACE

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_PB1100

config MIPS_PB1100

	bool "Alchemy PB1100 board"

	bool "Alchemy PB1100 board"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1000
@@ -96,14 +70,6 @@ config MIPS_PB1100 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_EARLY_PRINTK





config MIPS_PB1200

	bool "Alchemy PB1200 board"

	select ALCHEMY_GPIOINT_AU1000

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_HAS_EARLY_PRINTK



config MIPS_PB1500

config MIPS_PB1500

	bool "Alchemy PB1500 board"

	bool "Alchemy PB1500 board"

	select ALCHEMY_GPIOINT_AU1000

	select ALCHEMY_GPIOINT_AU1000

arch/mips/alchemy/Makefile

0 → 100644
+3 −0
Original line number Original line Diff line number Diff line 
obj-$(CONFIG_MIPS_GPR) += board-gpr.o

obj-$(CONFIG_MIPS_MTX1) += board-mtx1.o

obj-$(CONFIG_MIPS_XXS1500) += board-xxs1500.o

arch/mips/alchemy/Platform

+10 −48
Original line number Original line Diff line number Diff line
@@ -4,62 +4,31 @@ 
platform-$(CONFIG_MIPS_ALCHEMY)	+= alchemy/common/

platform-$(CONFIG_MIPS_ALCHEMY)	+= alchemy/common/









#

# AMD Alchemy Pb1000 eval board

#

platform-$(CONFIG_MIPS_PB1000)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1000)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1000)	+= 0xffffffff80100000



#

#

# AMD Alchemy Pb1100 eval board

# AMD Alchemy Pb1100 eval board

#

#

platform-$(CONFIG_MIPS_PB1100)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_PB1100)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1100)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1100)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_PB1100)	+= 0xffffffff80100000





#

#

# AMD Alchemy Pb1500 eval board

# AMD Alchemy Pb1500 eval board

#

#

platform-$(CONFIG_MIPS_PB1500)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_PB1500)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1500)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1500)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_PB1500)	+= 0xffffffff80100000





#

#

# AMD Alchemy Pb1550 eval board

# AMD Alchemy Pb1550 eval board

#

#

platform-$(CONFIG_MIPS_PB1550)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_PB1550)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1550)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1550)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_PB1550)	+= 0xffffffff80100000





#

#

# AMD Alchemy Pb1200 eval board

# AMD Alchemy Db1000/Db1500/Db1100 eval boards

#

platform-$(CONFIG_MIPS_PB1200)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_PB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-pb1x00

load-$(CONFIG_MIPS_PB1200)	+= 0xffffffff80100000



#

# AMD Alchemy Db1000 eval board

#

#

platform-$(CONFIG_MIPS_DB1000)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_DB1000)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_DB1000)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

cflags-$(CONFIG_MIPS_DB1000)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_DB1000)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_DB1000)	+= 0xffffffff80100000





#

# AMD Alchemy Db1100 eval board

#

platform-$(CONFIG_MIPS_DB1100)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_DB1100)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_DB1100)	+= 0xffffffff80100000



#

# AMD Alchemy Db1500 eval board

#

platform-$(CONFIG_MIPS_DB1500)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_DB1500)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_DB1500)	+= 0xffffffff80100000



#

#

# AMD Alchemy Db1550 eval board

# AMD Alchemy Db1550 eval board

#

#
@@ -68,42 +37,35 @@ cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 
load-$(CONFIG_MIPS_DB1550)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_DB1550)	+= 0xffffffff80100000





#

#

# AMD Alchemy Db1200 eval board

# AMD Alchemy Db1200/Pb1200 eval boards

#

#

platform-$(CONFIG_MIPS_DB1200)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_DB1200)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_DB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

cflags-$(CONFIG_MIPS_DB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_DB1200)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_DB1200)	+= 0xffffffff80100000





#

#

# AMD Alchemy Bosporus eval board

# NetLogic DBAu1300 development platform

#

platform-$(CONFIG_MIPS_BOSPORUS) += alchemy/devboards/

cflags-$(CONFIG_MIPS_BOSPORUS)	 += -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_BOSPORUS)	 += 0xffffffff80100000



#

# AMD Alchemy Mirage eval board

#

#

platform-$(CONFIG_MIPS_MIRAGE)	+= alchemy/devboards/

platform-$(CONFIG_MIPS_DB1300)	+= alchemy/devboards/

cflags-$(CONFIG_MIPS_MIRAGE)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

cflags-$(CONFIG_MIPS_DB1300)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00

load-$(CONFIG_MIPS_MIRAGE)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_DB1300)	+= 0xffffffff80100000





#

#

# 4G-Systems eval board

# 4G-Systems MTX-1 "MeshCube" wireless router

#

#

platform-$(CONFIG_MIPS_MTX1)	+= alchemy/mtx-1/

platform-$(CONFIG_MIPS_MTX1)	+= alchemy/

load-$(CONFIG_MIPS_MTX1)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_MTX1)	+= 0xffffffff80100000





#

#

# MyCable eval board

# MyCable eval board

#

#

platform-$(CONFIG_MIPS_XXS1500)	+= alchemy/xxs1500/

platform-$(CONFIG_MIPS_XXS1500)	+= alchemy/

load-$(CONFIG_MIPS_XXS1500)	+= 0xffffffff80100000

load-$(CONFIG_MIPS_XXS1500)	+= 0xffffffff80100000





#

#

# Trapeze ITS GRP board

# Trapeze ITS GRP board

#

#

platform-$(CONFIG_MIPS_GPR)	+= alchemy/gpr/

platform-$(CONFIG_MIPS_GPR)	+= alchemy/

load-$(CONFIG_MIPS_GPR)		+= 0xffffffff80100000

load-$(CONFIG_MIPS_GPR)		+= 0xffffffff80100000





# boards can specify their own <gpio.h> in one of their include dirs.

# boards can specify their own <gpio.h> in one of their include dirs.

arch/mips/alchemy/gpr/platform.c→arch/mips/alchemy/board-gpr.c

+77 −4
Original line number Original line Diff line number Diff line 
/*

/*

 * GPR board platform device registration

 * GPR board platform device registration (Au1550)

 *

 *

 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>

 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>

 *

 *
@@ -18,16 +18,89 @@ 
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

 */

 */





#include <linux/delay.h>

#include <linux/init.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/platform_device.h>

#include <linux/platform_device.h>

#include <linux/pm.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/physmap.h>

#include <linux/mtd/physmap.h>

#include <linux/leds.h>

#include <linux/leds.h>

#include <linux/gpio.h>

#include <linux/gpio.h>

#include <linux/i2c.h>

#include <linux/i2c.h>

#include <linux/i2c-gpio.h>

#include <linux/i2c-gpio.h>



#include <asm/bootinfo.h>

#include <asm/reboot.h>

#include <asm/mach-au1x00/au1000.h>

#include <asm/mach-au1x00/au1000.h>

#include <prom.h>



const char *get_system_type(void)

{

	return "GPR";

}



void __init prom_init(void)

{

	unsigned char *memsize_str;

	unsigned long memsize;



	prom_argc = fw_arg0;

	prom_argv = (char **)fw_arg1;

	prom_envp = (char **)fw_arg2;



	prom_init_cmdline();



	memsize_str = prom_getenv("memsize");

	if (!memsize_str)

		memsize = 0x04000000;

	else

		strict_strtoul(memsize_str, 0, &memsize);

	add_memory_region(0, memsize, BOOT_MEM_RAM);

}



void prom_putchar(unsigned char c)

{

	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);

}



static void gpr_reset(char *c)

{

	/* switch System-LED to orange (red# and green# on) */

	alchemy_gpio_direction_output(4, 0);

	alchemy_gpio_direction_output(5, 0);



	/* trigger watchdog to reset board in 200ms */

	printk(KERN_EMERG "Triggering watchdog soft reset...\n");

	raw_local_irq_disable();

	alchemy_gpio_direction_output(1, 0);

	udelay(1);

	alchemy_gpio_set_value(1, 1);

	while (1)

		cpu_wait();

}



static void gpr_power_off(void)

{

	while (1)

		cpu_wait();

}



void __init board_setup(void)

{

	printk(KERN_INFO "Trapeze ITS GPR board\n");



	pm_power_off = gpr_power_off;

	_machine_halt = gpr_power_off;

	_machine_restart = gpr_reset;



	/* Enable UART1/3 */

	alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);

	alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);



	/* Take away Reset of UMTS-card */

	alchemy_gpio_direction_output(215, 1);

}





/*

/*

 * Watchdog

 * Watchdog
@@ -184,7 +257,7 @@ static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) 
	else if ((slot == 0) && (pin == 2))

	else if ((slot == 0) && (pin == 2))

		return AU1550_PCI_INTB;

		return AU1550_PCI_INTB;





	return -1;

	return 0xff;

}

}





static struct alchemy_pci_platdata gpr_pci_pd = {

static struct alchemy_pci_platdata gpr_pci_pd = {

arch/mips/alchemy/mtx-1/platform.c→arch/mips/alchemy/board-mtx1.c

+88 −5
Original line number Original line Diff line number Diff line 
/*

/*

 * MTX-1 platform devices registration

 * MTX-1 platform devices registration (Au1500)

 *

 *

 * Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>

 * Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>

 *

 *
@@ -19,6 +19,8 @@ 
 */

 */





#include <linux/init.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/platform_device.h>

#include <linux/platform_device.h>

#include <linux/leds.h>

#include <linux/leds.h>

#include <linux/gpio.h>

#include <linux/gpio.h>
@@ -27,8 +29,85 @@ 
#include <linux/mtd/partitions.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/physmap.h>

#include <linux/mtd/physmap.h>

#include <mtd/mtd-abi.h>

#include <mtd/mtd-abi.h>



#include <asm/bootinfo.h>

#include <asm/reboot.h>

#include <asm/mach-au1x00/au1000.h>

#include <asm/mach-au1x00/au1xxx_eth.h>

#include <asm/mach-au1x00/au1xxx_eth.h>

#include <prom.h>



const char *get_system_type(void)

{

	return "MTX-1";

}



void __init prom_init(void)

{

	unsigned char *memsize_str;

	unsigned long memsize;



	prom_argc = fw_arg0;

	prom_argv = (char **)fw_arg1;

	prom_envp = (char **)fw_arg2;



	prom_init_cmdline();



	memsize_str = prom_getenv("memsize");

	if (!memsize_str)

		memsize = 0x04000000;

	else

		strict_strtoul(memsize_str, 0, &memsize);

	add_memory_region(0, memsize, BOOT_MEM_RAM);

}



void prom_putchar(unsigned char c)

{

	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);

}



static void mtx1_reset(char *c)

{

	/* Jump to the reset vector */

	__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));

}



static void mtx1_power_off(void)

{

	while (1)

		asm volatile (

		"	.set	mips32					\n"

		"	wait						\n"

		"	.set	mips0					\n");

}



void __init board_setup(void)

{

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)

	/* Enable USB power switch */

	alchemy_gpio_direction_output(204, 0);

#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */



	/* Initialize sys_pinfunc */

	au_writel(SYS_PF_NI2, SYS_PINFUNC);



	/* Initialize GPIO */

	au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);

	alchemy_gpio_direction_output(0, 0);	/* Disable M66EN (PCI 66MHz) */

	alchemy_gpio_direction_output(3, 1);	/* Disable PCI CLKRUN# */

	alchemy_gpio_direction_output(1, 1);	/* Enable EXT_IO3 */

	alchemy_gpio_direction_output(5, 0);	/* Disable eth PHY TX_ER */



	/* Enable LED and set it to green */

	alchemy_gpio_direction_output(211, 1);	/* green on */

	alchemy_gpio_direction_output(212, 0);	/* red off */



	pm_power_off = mtx1_power_off;

	_machine_halt = mtx1_power_off;

	_machine_restart = mtx1_reset;



	printk(KERN_INFO "4G Systems MTX-1 Board\n");

}



/******************************************************************************/





static struct gpio_keys_button mtx1_gpio_button[] = {

static struct gpio_keys_button mtx1_gpio_button[] = {

	{

	{
@@ -195,7 +274,6 @@ static struct platform_device mtx1_pci_host = { 
	.resource	= alchemy_pci_host_res,

	.resource	= alchemy_pci_host_res,

};

};







static struct __initdata platform_device * mtx1_devs[] = {

static struct __initdata platform_device * mtx1_devs[] = {

	&mtx1_pci_host,

	&mtx1_pci_host,

	&mtx1_gpio_leds,

	&mtx1_gpio_leds,
@@ -213,6 +291,12 @@ static int __init mtx1_register_devices(void) 
{

{

	int rc;

	int rc;





	irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);

	irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);

	irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);

	irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);

	irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);



	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);

	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);





	rc = gpio_request(mtx1_gpio_button[0].gpio,

	rc = gpio_request(mtx1_gpio_button[0].gpio,
@@ -226,5 +310,4 @@ static int __init mtx1_register_devices(void) 
out:

out:

	return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));

	return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));

}

}



arch_initcall(mtx1_register_devices);
 
arch_initcall(mtx1_register_devices);