Merge tag 'disintegrate-x86-20121214' of git://git.infradead.org/users/dhowells/linux-headers (7a280cf5) · Commits · e / devices / android_kernel_xiaomi_markw

arch/x86/include/asm/Kbuild

+0 −26

Original line number	Diff line number	Diff line
		include include/asm-generic/Kbuild.asm

		header-y += boot.h
		header-y += bootparam.h
		header-y += debugreg.h
		header-y += e820.h
		header-y += hw_breakpoint.h
		header-y += hyperv.h
		header-y += ist.h
		header-y += ldt.h
		header-y += mce.h
		header-y += msr-index.h
		header-y += msr.h
		header-y += mtrr.h
		header-y += perf_regs.h
		header-y += posix_types_32.h
		header-y += posix_types_64.h
		header-y += posix_types_x32.h
		header-y += prctl.h
		header-y += processor-flags.h
		header-y += ptrace-abi.h
		header-y += sigcontext32.h
		header-y += svm.h
		header-y += ucontext.h
		header-y += vm86.h
		header-y += vmx.h
		header-y += vsyscall.h

		genhdr-y += unistd_32.h
		genhdr-y += unistd_64.h

arch/x86/include/asm/boot.h

+1 −8

Original line number	Diff line number	Diff line
		#ifndef _ASM_X86_BOOT_H
		#define _ASM_X86_BOOT_H

		/* Internal svga startup constants */
		#define NORMAL_VGA 0xffff /* 80x25 mode */
		#define EXTENDED_VGA 0xfffe /* 80x50 mode */
		#define ASK_VGA 0xfffd /* ask for it at bootup */

		#ifdef __KERNEL__

		#include <asm/pgtable_types.h>
		#include <uapi/asm/boot.h>

		/* Physical address where kernel should be loaded. */
		#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
		@@ -42,6 +37,4 @@
		#define BOOT_STACK_SIZE 0x1000
		#endif

		#endif /* __KERNEL__ */

		#endif /* _ASM_X86_BOOT_H */

arch/x86/include/asm/debugreg.h

+1 −78

Original line number	Diff line number	Diff line
		@@ -2,83 +2,8 @@
		#define _ASM_X86_DEBUGREG_H


		/* Indicate the register numbers for a number of the specific
		debug registers. Registers 0-3 contain the addresses we wish to trap on */
		#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */
		#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */

		#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */
		#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */

		/* Define a few things for the status register. We can use this to determine
		which debugging register was responsible for the trap. The other bits
		are either reserved or not of interest to us. */

		/* Define reserved bits in DR6 which are always set to 1 */
		#define DR6_RESERVED (0xFFFF0FF0)

		#define DR_TRAP0 (0x1) /* db0 */
		#define DR_TRAP1 (0x2) /* db1 */
		#define DR_TRAP2 (0x4) /* db2 */
		#define DR_TRAP3 (0x8) /* db3 */
		#define DR_TRAP_BITS (DR_TRAP0\|DR_TRAP1\|DR_TRAP2\|DR_TRAP3)

		#define DR_STEP (0x4000) /* single-step */
		#define DR_SWITCH (0x8000) /* task switch */

		/* Now define a bunch of things for manipulating the control register.
		The top two bytes of the control register consist of 4 fields of 4
		bits - each field corresponds to one of the four debug registers,
		and indicates what types of access we trap on, and how large the data
		field is that we are looking at */

		#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
		#define DR_CONTROL_SIZE 4 /* 4 control bits per register */

		#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
		#define DR_RW_WRITE (0x1)
		#define DR_RW_READ (0x3)

		#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
		#define DR_LEN_2 (0x4)
		#define DR_LEN_4 (0xC)
		#define DR_LEN_8 (0x8)

		/* The low byte to the control register determine which registers are
		enabled. There are 4 fields of two bits. One bit is "local", meaning
		that the processor will reset the bit after a task switch and the other
		is global meaning that we have to explicitly reset the bit. With linux,
		you can use either one, since we explicitly zero the register when we enter
		kernel mode. */

		#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */
		#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
		#define DR_LOCAL_ENABLE (0x1) /* Local enable for reg 0 */
		#define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */
		#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */

		#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
		#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */

		/* The second byte to the control register has a few special things.
		We can slow the instruction pipeline for instructions coming via the
		gdt or the ldt if we want to. I am not sure why this is an advantage */

		#ifdef __i386__
		#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
		#else
		#define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */
		#endif

		#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */
		#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */

		/*
		* HW breakpoint additions
		*/
		#ifdef __KERNEL__

		#include <linux/bug.h>
		#include <uapi/asm/debugreg.h>

		DECLARE_PER_CPU(unsigned long, cpu_dr7);

		@@ -190,6 +115,4 @@ static inline void debug_stack_usage_dec(void) { }
		#endif /* X86_64 */


		#endif /* __KERNEL__ */

		#endif /* _ASM_X86_DEBUGREG_H */

arch/x86/include/asm/e820.h

+1 −73

Original line number	Diff line number	Diff line
		#ifndef _ASM_X86_E820_H
		#define _ASM_X86_E820_H
		#define E820MAP 0x2d0 /* our map */
		#define E820MAX 128 /* number of entries in E820MAP */

		/*
		* Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the
		* constrained space in the zeropage. If we have more nodes than
		* that, and if we've booted off EFI firmware, then the EFI tables
		* passed us from the EFI firmware can list more nodes. Size our
		* internal memory map tables to have room for these additional
		* nodes, based on up to three entries per node for which the
		* kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT),
		* plus E820MAX, allowing space for the possible duplicate E820
		* entries that might need room in the same arrays, prior to the
		* call to sanitize_e820_map() to remove duplicates. The allowance
		* of three memory map entries per node is "enough" entries for
		* the initial hardware platform motivating this mechanism to make
		* use of additional EFI map entries. Future platforms may want
		* to allow more than three entries per node or otherwise refine
		* this size.
		*/

		/*
		* Odd: 'make headers_check' complains about numa.h if I try
		* to collapse the next two #ifdef lines to a single line:
		* #if defined(__KERNEL__) && defined(CONFIG_EFI)
		*/
		#ifdef __KERNEL__
		#ifdef CONFIG_EFI
		#include <linux/numa.h>
		#define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES)
		#else /* ! CONFIG_EFI */
		#define E820_X_MAX E820MAX
		#endif
		#else /* ! __KERNEL__ */
		#define E820_X_MAX E820MAX
		#endif

		#define E820NR 0x1e8 /* # entries in E820MAP */

		#define E820_RAM 1
		#define E820_RESERVED 2
		#define E820_ACPI 3
		#define E820_NVS 4
		#define E820_UNUSABLE 5

		/*
		* reserved RAM used by kernel itself
		* if CONFIG_INTEL_TXT is enabled, memory of this type will be
		* included in the S3 integrity calculation and so should not include
		* any memory that BIOS might alter over the S3 transition
		*/
		#define E820_RESERVED_KERN 128

		#include <uapi/asm/e820.h>
		#ifndef __ASSEMBLY__
		#include <linux/types.h>
		struct e820entry {
		__u64 addr; /* start of memory segment */
		__u64 size; /* size of memory segment */
		__u32 type; /* type of memory segment */
		} __attribute__((packed));

		struct e820map {
		__u32 nr_map;
		struct e820entry map[E820_X_MAX];
		};

		#define ISA_START_ADDRESS 0xa0000
		#define ISA_END_ADDRESS 0x100000

		#define BIOS_BEGIN 0x000a0000
		#define BIOS_END 0x00100000

		#define BIOS_ROM_BASE 0xffe00000
		#define BIOS_ROM_END 0xffffffff

		#ifdef __KERNEL__
		/* see comment in arch/x86/kernel/e820.c */
		extern struct e820map e820;
		extern struct e820map e820_saved;
		@@ -137,13 +70,8 @@ static inline bool is_ISA_range(u64 s, u64 e)
		return s >= ISA_START_ADDRESS && e <= ISA_END_ADDRESS;
		}

		#endif /* __KERNEL__ */
		#endif /* __ASSEMBLY__ */

		#ifdef __KERNEL__
		#include <linux/ioport.h>

		#define HIGH_MEMORY (1024*1024)
		#endif /* __KERNEL__ */

		#endif /* _ASM_X86_E820_H */

arch/x86/include/asm/hw_breakpoint.h

+2 −3

Original line number	Diff line number	Diff line
		#ifndef _I386_HW_BREAKPOINT_H
		#define _I386_HW_BREAKPOINT_H

		#ifdef __KERNEL__
		#include <uapi/asm/hw_breakpoint.h>

		#define __ARCH_HW_BREAKPOINT_H

		/*
		@@ -71,6 +72,4 @@ extern int arch_bp_generic_fields(int x86_len, int x86_type,

		extern struct pmu perf_ops_bp;

		#endif /* __KERNEL__ */
		#endif /* _I386_HW_BREAKPOINT_H */