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Commit 794e96e8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp 

Pull EDAC updates from Borislav Petkov:
 "Following up on last week's discussion, here's my part of the EDAC
  pile, highlights in the signed tag.

  The last two patches have a date from just now because I've just
  applied them to the tree after Johannes sent them to me earlier.  I
  decided to forward them now because they're trivial.

  There's a third one for MPC85xx which adds PCIe error interrupt
  support but since it is not so trivial and hasn't seen any linux-next
  time, I'm deferring it to 3.14

  EDAC update highlights:
   - Support for Calxeda ECX-2000 memory controller, from Robert Richter
   - Misc Calxeda Highbank drivers and EDAC core cleanups, from Rob
     Herring and Robert Richter
   - New maintainer for Freescale's MPC85xx EDAC driver: Johannes
     Thumshirn"

* tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  edac/85xx: Remove mpc85xx_pci_err_remove
  EDAC: Add edac-mpc85xx driver to MAINTAINERS
  edac, highbank: Moving error injection to sysfs for edac
  edac, highbank: Add MAINTAINERS entry
  edac: Unify reporting of device info for device, mc and pci
  edac, highbank: Improve and unify naming
  edac, highbank: Add Calxeda ECX-2000 support
  ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsi
  edac, highbank: Fix interrupt setup of mem and l2 controller
parents c2ac2ae4 0f1741c7

Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt

+3 −1
Original line number Original line Diff line number Diff line 
Calxeda DDR memory controller

Calxeda DDR memory controller





Properties:

Properties:

- compatible : Should be "calxeda,hb-ddr-ctrl"

- compatible : Should be:

  - "calxeda,hb-ddr-ctrl" for ECX-1000

  - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000

- reg : Address and size for DDR controller registers.

- reg : Address and size for DDR controller registers.

- interrupts : Interrupt for DDR controller.

- interrupts : Interrupt for DDR controller.

MAINTAINERS

+15 −0
Original line number Original line Diff line number Diff line
@@ -3063,6 +3063,14 @@ W: bluesmoke.sourceforge.net 
S:	Maintained

S:	Maintained

F:	drivers/edac/amd64_edac*

F:	drivers/edac/amd64_edac*





EDAC-CALXEDA

M:	Doug Thompson <dougthompson@xmission.com>

M:	Robert Richter <rric@kernel.org>

L:	linux-edac@vger.kernel.org

W:	bluesmoke.sourceforge.net

S:	Maintained

F:	drivers/edac/highbank*



EDAC-CAVIUM

EDAC-CAVIUM

M:	Ralf Baechle <ralf@linux-mips.org>

M:	Ralf Baechle <ralf@linux-mips.org>

M:	David Daney <david.daney@cavium.com>

M:	David Daney <david.daney@cavium.com>
@@ -3144,6 +3152,13 @@ W: bluesmoke.sourceforge.net 
S:	Maintained

S:	Maintained

F:	drivers/edac/i82975x_edac.c

F:	drivers/edac/i82975x_edac.c





EDAC-MPC85XX

M:	Johannes Thumshirn <johannes.thumshirn@men.de>

L:	linux-edac@vger.kernel.org

W:	bluesmoke.sourceforge.net

S:	Maintained

F:	drivers/edac/mpc85xx_edac.[ch]



EDAC-PASEMI

EDAC-PASEMI

M:	Egor Martovetsky <egor@pasemi.com>

M:	Egor Martovetsky <egor@pasemi.com>

L:	linux-edac@vger.kernel.org

L:	linux-edac@vger.kernel.org

arch/arm/boot/dts/ecx-2000.dts

+6 −0
Original line number Original line Diff line number Diff line
@@ -85,6 +85,12 @@ 
				<1 10 0xf08>;

				<1 10 0xf08>;

		};

		};





		memory-controller@fff00000 {

			compatible = "calxeda,ecx-2000-ddr-ctrl";

			reg = <0xfff00000 0x1000>;

			interrupts = <0 91 4>;

		};



		intc: interrupt-controller@fff11000 {

		intc: interrupt-controller@fff11000 {

			compatible = "arm,cortex-a15-gic";

			compatible = "arm,cortex-a15-gic";

			#interrupt-cells = <3>;

			#interrupt-cells = <3>;

arch/arm/boot/dts/ecx-common.dtsi

+0 −6
Original line number Original line Diff line number Diff line
@@ -53,12 +53,6 @@ 
			status = "disabled";

			status = "disabled";

		};

		};





		memory-controller@fff00000 {

			compatible = "calxeda,hb-ddr-ctrl";

			reg = <0xfff00000 0x1000>;

			interrupts = <0 91 4>;

		};



		ipc@fff20000 {

		ipc@fff20000 {

			compatible = "arm,pl320", "arm,primecell";

			compatible = "arm,pl320", "arm,primecell";

			reg = <0xfff20000 0x1000>;

			reg = <0xfff20000 0x1000>;

arch/arm/boot/dts/highbank.dts

+6 −0
Original line number Original line Diff line number Diff line
@@ -86,6 +86,12 @@ 
	soc {

	soc {

		ranges = <0x00000000 0x00000000 0xffffffff>;

		ranges = <0x00000000 0x00000000 0xffffffff>;





		memory-controller@fff00000 {

			compatible = "calxeda,hb-ddr-ctrl";

			reg = <0xfff00000 0x1000>;

			interrupts = <0 91 4>;

		};



		timer@fff10600 {

		timer@fff10600 {

			compatible = "arm,cortex-a9-twd-timer";

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xfff10600 0x20>;

			reg = <0xfff10600 0x20>;