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Commit 78709b9d authored by Ralf Baechle's avatar Ralf Baechle
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[MIPS] IP22: Get rid of volatile in IP22 core code.

parent 2127435e
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+12 −12
Original line number Diff line number Diff line
@@ -52,8 +52,7 @@
 * national semiconductor nv ram chip the op code is 3 bits and
 * the address is 6/8 bits.
 */
static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
			      unsigned reg)
static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
{
	unsigned short ser_cmd;
	int i;
@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
	ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
	for (i = 0; i < BITS_IN_COMMAND; i++) {
		if (ser_cmd & (1<<15))	/* if high order bit set */
			*ctrl |= EEPROM_DATO;
			writel(readl(ctrl) | EEPROM_DATO, ctrl);
		else
			*ctrl &= ~EEPROM_DATO;
		*ctrl &= ~EEPROM_ECLK;
		*ctrl |= EEPROM_ECLK;
			writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
		writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
		writel(readl(ctrl) | EEPROM_ECLK, ctrl);
		ser_cmd <<= 1;
	}
	*ctrl &= ~EEPROM_DATO;	/* see data sheet timing diagram */
	/* see data sheet timing diagram */
	writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
}

unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg)
unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
{
	unsigned short res = 0;
	int i;

	*ctrl &= ~EEPROM_EPROT;
	writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
	eeprom_cs_on(ctrl);
	eeprom_cmd(ctrl, EEPROM_READ, reg);

	/* clock the data ouf of serial mem */
	for (i = 0; i < 16; i++) {
		*ctrl &= ~EEPROM_ECLK;
		writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
		delay();
		*ctrl |= EEPROM_ECLK;
		writel(readl(ctrl) | EEPROM_ECLK, ctrl);
		delay();
		res <<= 1;
		if (*ctrl & EEPROM_DATI)
		if (readl(ctrl) & EEPROM_DATI)
			res |= 1;
	}

+7 −7
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ static int indy_rtc_set_time(unsigned long tim)
static unsigned long dosample(void)
{
	u32 ct0, ct1;
	volatile u8 msb, lsb;
	u8 msb, lsb;

	/* Start the counter. */
	sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@@ -107,21 +107,21 @@ static unsigned long dosample(void)

	/* Latch and spin until top byte of counter2 is zero */
	do {
		sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
		lsb = sgint->tcnt2;
		msb = sgint->tcnt2;
		writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
		lsb = readb(&sgint->tcnt2);
		msb = readb(&sgint->tcnt2);
		ct1 = read_c0_count();
	} while (msb);

	/* Stop the counter. */
	sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
			 SGINT_TCWORD_MSWST);
	writeb(sgint->tcword, (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
			       SGINT_TCWORD_MSWST));
	/*
	 * Return the difference, this is how far the r4k counter increments
	 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
	 * clock (= 1000000 / HZ / 2).
	 */
	/*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/

	return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
}

+1 −1
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ struct hpc3_regs {
#define HPC3_GIOMISC_ERTIME	0x1	/* Enable external timer real time. */
#define HPC3_GIOMISC_DENDIAN	0x2	/* dma descriptor endian, 1=lit 0=big */

	volatile u32 eeprom;		/* EEPROM data reg. */
	u32 eeprom;			/* EEPROM data reg. */
#define HPC3_EEPROM_EPROT	0x01	/* Protect register enable */
#define HPC3_EEPROM_CSEL	0x02	/* Chip select */
#define HPC3_EEPROM_ECLK	0x04	/* EEPROM clock */
+1 −1
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@

#define ip22_is_fullhouse()	(sgioc->sysid & SGIOC_SYSID_FULLHOUSE)

extern unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg);
extern unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg);
extern unsigned short ip22_nvram_read(int reg);

#endif
+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ struct sgimc_regs {
	volatile u32 divider;	/* Divider reg for RPSS */

	u32 _unused5;
	volatile u32 eeprom;	/* EEPROM byte reg for r4k */
	u32 eeprom;		/* EEPROM byte reg for r4k */
#define SGIMC_EEPROM_PRE	0x00000001 /* eeprom chip PRE pin assertion */
#define SGIMC_EEPROM_CSEL	0x00000002 /* Active high, eeprom chip select */
#define SGIMC_EEPROM_SECLOCK	0x00000004 /* EEPROM serial clock */