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Commit 7800c0c3 authored by Matti Linnanvuori's avatar Matti Linnanvuori Committed by Ingo Molnar
Browse files

sync_bitops: fix wrong comments [Bug 10247] 



Fix wrong function name and references to non-x86 architectures.

Signed-off-by: default avatarMatti Linnanvuori <mattilinnanvuori@yahoo.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 5dca6a1b

include/asm-x86/sync_bitops.h

+1 −8
Original line number Diff line number Diff line
@@ -23,10 +23,6 @@ 
 * This function is atomic and may not be reordered.  See __set_bit()

 * if you do not require the atomic guarantees.

 *

 * Note: there are no guarantees that this function will not be reordered

 * on non-x86 architectures, so if you are writing portable code,

 * make sure not to rely on its reordering guarantees.

 *

 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */
@@ -61,8 +57,7 @@ static inline void sync_clear_bit(int nr, volatile unsigned long * addr) 
 * @nr: Bit to change

 * @addr: Address to start counting from

 *

 * change_bit() is atomic and may not be reordered. It may be

 * reordered on other architectures than x86.

 * sync_change_bit() is atomic and may not be reordered.

 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */
@@ -80,7 +75,6 @@ static inline void sync_change_bit(int nr, volatile unsigned long * addr) 
 * @addr: Address to count from

 *

 * This operation is atomic and cannot be reordered.

 * It may be reordered on other architectures than x86.

 * It also implies a memory barrier.

 */

static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
@@ -99,7 +93,6 @@ static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr) 
 * @addr: Address to count from

 *

 * This operation is atomic and cannot be reordered.

 * It can be reorderdered on other architectures other than x86.

 * It also implies a memory barrier.

 */

static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr)