Merge "ARM: dts: msm: Enable the GPU QDSS STM for msm8996" (77e4baac) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/gpu/adreno.txt

+5 −0

Original line number	Diff line number	Diff line
		@@ -143,6 +143,11 @@ Optional Properties:
		This value indicates which qcom,gpu-pwrlevel to jump on in case
		of context aware power level jump.

		- qcom,gpu-qdss-stm:
		<baseAddr size>
		baseAddr - base address of the gpu channels in the qdss stm memory region
		size - size of the gpu stm region

		GPU Quirks:
		- qcom,gpu-quirk-two-pass-use-wfi:
		Signal the GPU to set Set TWOPASSUSEWFI bit in

arch/arm/boot/dts/qcom/msm8996-gpu.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -79,6 +79,8 @@

		qcom,snapshot-size = <1048576>; //bytes

		qcom,gpu-qdss-stm = <0x081c0000 0x40000>; // base addr, size

		/* Trace bus */
		coresight-id = <300>;
		coresight-name = "coresight-gfx";

drivers/gpu/msm/adreno.c

+24 −0

Original line number	Diff line number	Diff line
		@@ -1763,6 +1763,30 @@ static int adreno_getproperty(struct kgsl_device *device,
		status = 0;
		}
		break;
		case KGSL_PROP_DEVICE_QDSS_STM:
		{
		struct kgsl_qdss_stm_prop qdssprop = {0};
		struct kgsl_memdesc *qdss_desc =
		kgsl_mmu_get_qdss_global_entry(device);

		if (sizebytes != sizeof(qdssprop)) {
		status = -EINVAL;
		break;
		}

		if (qdss_desc) {
		qdssprop.gpuaddr = qdss_desc->gpuaddr;
		qdssprop.size = qdss_desc->size;
		}

		if (copy_to_user(value, &qdssprop,
		sizeof(qdssprop))) {
		status = -EFAULT;
		break;
		}
		status = 0;
		}
		break;
		case KGSL_PROP_MMU_ENABLE:
		{
		/* Report MMU only if we can handle paged memory */

drivers/gpu/msm/adreno_compat.c

+24 −0

Original line number	Diff line number	Diff line
		@@ -89,6 +89,30 @@ int adreno_getproperty_compat(struct kgsl_device *device,
		status = 0;
		}
		break;
		case KGSL_PROP_DEVICE_QDSS_STM:
		{
		struct kgsl_qdss_stm_prop qdssprop = {0};
		struct kgsl_memdesc *qdss_desc =
		kgsl_mmu_get_qdss_global_entry(device);

		if (sizebytes != sizeof(qdssprop)) {
		status = -EINVAL;
		break;
		}

		if (qdss_desc) {
		qdssprop.gpuaddr = qdss_desc->gpuaddr;
		qdssprop.size = qdss_desc->size;
		}

		if (copy_to_user(value, &qdssprop,
		sizeof(qdssprop))) {
		status = -EFAULT;
		break;
		}
		status = 0;
		}
		break;
		default:
		/*
		* Call the adreno_getproperty to check if the property type

drivers/gpu/msm/kgsl_iommu.c

+49 −0

Original line number	Diff line number	Diff line
		@@ -96,6 +96,7 @@ static struct kgsl_memdesc *global_pt_entries[GLOBAL_PT_ENTRIES];
		static struct kgsl_memdesc *kgsl_global_secure_pt_entry;
		static int global_pt_count;
		uint64_t global_pt_alloc;
		static struct kgsl_memdesc gpu_qdss_desc;

		static void kgsl_iommu_unmap_globals(struct kgsl_pagetable *pagetable)
		{
		@@ -183,6 +184,51 @@ void kgsl_add_global_secure_entry(struct kgsl_device *device,
		kgsl_global_secure_pt_entry = memdesc;
		}

		struct kgsl_memdesc *kgsl_iommu_get_qdss_global_entry(void)
		{
		return &gpu_qdss_desc;
		}

		static void kgsl_setup_qdss_desc(struct kgsl_device *device)
		{
		int result = 0;
		uint32_t gpu_qdss_entry[2];

		if (!of_find_property(device->pdev->dev.of_node,
		"qcom,gpu-qdss-stm", NULL))
		return;

		if (of_property_read_u32_array(device->pdev->dev.of_node,
		"qcom,gpu-qdss-stm", gpu_qdss_entry, 2)) {
		KGSL_CORE_ERR("Failed to read gpu qdss dts entry\n");
		return;
		}

		gpu_qdss_desc.flags = 0;
		gpu_qdss_desc.priv = 0;
		gpu_qdss_desc.physaddr = gpu_qdss_entry[0];
		gpu_qdss_desc.size = gpu_qdss_entry[1];
		gpu_qdss_desc.pagetable = NULL;
		gpu_qdss_desc.ops = NULL;
		gpu_qdss_desc.dev = device->dev->parent;
		gpu_qdss_desc.hostptr = NULL;

		result = memdesc_sg_dma(&gpu_qdss_desc, gpu_qdss_desc.physaddr,
		gpu_qdss_desc.size);
		if (result) {
		KGSL_CORE_ERR("memdesc_sg_dma failed: %d\n", result);
		return;
		}

		kgsl_mmu_add_global(device, &gpu_qdss_desc);
		}

		static inline void kgsl_cleanup_qdss_desc(struct kgsl_mmu *mmu)
		{
		kgsl_iommu_remove_global(mmu, &gpu_qdss_desc);
		kgsl_sharedmem_free(&gpu_qdss_desc);
		}


		static inline void _iommu_sync_mmu_pc(bool lock)
		{
		@@ -1265,6 +1311,7 @@ static void kgsl_iommu_close(struct kgsl_mmu *mmu)

		kgsl_iommu_remove_global(mmu, &iommu->setstate);
		kgsl_sharedmem_free(&iommu->setstate);
		kgsl_cleanup_qdss_desc(mmu);
		}

		static int _setstate_alloc(struct kgsl_device *device,
		@@ -1336,6 +1383,7 @@ static int kgsl_iommu_init(struct kgsl_mmu *mmu)
		}

		kgsl_iommu_add_global(mmu, &iommu->setstate);
		kgsl_setup_qdss_desc(device);

		done:
		if (status)
		@@ -2379,6 +2427,7 @@ struct kgsl_mmu_ops kgsl_iommu_ops = {
		.mmu_add_global = kgsl_iommu_add_global,
		.mmu_remove_global = kgsl_iommu_remove_global,
		.mmu_getpagetable = kgsl_iommu_getpagetable,
		.mmu_get_qdss_global_entry = kgsl_iommu_get_qdss_global_entry,
		.probe = kgsl_iommu_probe,
		};