Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 77e29bc6 authored by Anjali Singhai Jain's avatar Anjali Singhai Jain Committed by Jeff Kirsher
Browse files

i40e/i40evf: Some flow director HW definition fixes 



1) Fix a name of the error bit to correctly indicate the error.
2) Added a fd_id field in the 32 byte desc at the place(qw0) where it gets
reported in the programming error desc WB. In a normal data desc
the fd_id field is reported in qw3.

Change-ID: Ide9a24bff7273da5889c36635d629bc3b5212010
Signed-off-by: default avatarAnjali Singhai Jain <anjali.singhai@intel.com>
Acked-by: default avatarShannon Nelson <shannon.nelson@intel.com>
Signed-off-by: default avatarKevin Scott <kevin.c.scott@intel.com>
Signed-off-by: default avatarCatherine Sullivan <catherine.sullivan@intel.com>
Tested-by: default avatarKavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 43fddb75

drivers/net/ethernet/intel/i40e/i40e_type.h

+5 −1
Original line number Diff line number Diff line
@@ -458,6 +458,10 @@ union i40e_32byte_rx_desc { 
			union {

				__le32 rss; /* RSS Hash */

				__le32 fcoe_param; /* FCoE DDP Context id */

				/* Flow director filter id in case of

				 * Programming status desc WB

				 */

				__le32 fd_id;

			} hi_dword;

		} qword0;

		struct {
@@ -698,7 +702,7 @@ enum i40e_rx_prog_status_desc_prog_id_masks { 
enum i40e_rx_prog_status_desc_error_bits {

	/* Note: These are predefined bit offsets */

	I40E_RX_PROG_STATUS_DESC_FD_TBL_FULL_SHIFT	= 0,

	I40E_RX_PROG_STATUS_DESC_NO_FD_QUOTA_SHIFT	= 1,

	I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT	= 1,

	I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT	= 2,

	I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT	= 3

};

drivers/net/ethernet/intel/i40evf/i40e_type.h

+5 −1
Original line number Diff line number Diff line
@@ -464,6 +464,10 @@ union i40e_32byte_rx_desc { 
			union {

				__le32 rss; /* RSS Hash */

				__le32 fcoe_param; /* FCoE DDP Context id */

				/* Flow director filter id in case of

				 * Programming status desc WB

				 */

				__le32 fd_id;

			} hi_dword;

		} qword0;

		struct {
@@ -704,7 +708,7 @@ enum i40e_rx_prog_status_desc_prog_id_masks { 
enum i40e_rx_prog_status_desc_error_bits {

	/* Note: These are predefined bit offsets */

	I40E_RX_PROG_STATUS_DESC_FD_TBL_FULL_SHIFT	= 0,

	I40E_RX_PROG_STATUS_DESC_NO_FD_QUOTA_SHIFT	= 1,

	I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT	= 1,

	I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT	= 2,

	I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT	= 3

};