Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 77ae798f authored by Jayachandran C's avatar Jayachandran C Committed by John Crispin
Browse files

MIPS: Netlogic: Support for multi-chip configuration 



Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system.  Each SoC has its own set of on-chip
devices including PIC.  To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.

Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 2a37b1ae

arch/mips/include/asm/netlogic/common.h

+37 −5
Original line number Diff line number Diff line
@@ -46,10 +46,10 @@ 


#ifndef __ASSEMBLY__

#include <linux/cpumask.h>

#include <linux/spinlock.h>

#include <asm/irq.h>



struct irq_desc;

extern struct plat_smp_ops nlm_smp_ops;

extern char nlm_reset_entry[], nlm_reset_entry_end[];

void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc);

void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc);

void nlm_smp_irq_init(void);
@@ -70,10 +70,42 @@ nlm_set_nmi_handler(void *handler) 
 * Misc.

 */

unsigned int nlm_get_cpu_frequency(void);

void nlm_node_init(int node);

extern struct plat_smp_ops nlm_smp_ops;

extern char nlm_reset_entry[], nlm_reset_entry_end[];



extern unsigned long nlm_common_ebase;

extern int nlm_threads_per_core;

extern uint32_t nlm_coremask;

extern unsigned int nlm_threads_per_core;

extern cpumask_t nlm_cpumask;



struct nlm_soc_info {

	unsigned long coremask;	/* cores enabled on the soc */

	unsigned long ebase;

	uint64_t irqmask;

	uint64_t sysbase;	/* only for XLP */

	uint64_t picbase;

	spinlock_t piclock;

};



#define NLM_CORES_PER_NODE	8

#define NLM_THREADS_PER_CORE	4

#define NLM_CPUS_PER_NODE	(NLM_CORES_PER_NODE * NLM_THREADS_PER_CORE)

#define	nlm_get_node(i)		(&nlm_nodes[i])

#define NLM_NR_NODES		1

#define	nlm_current_node()	(&nlm_nodes[0])



struct irq_data;

uint64_t nlm_pci_irqmask(int node);

void nlm_set_pic_extra_ack(int node, int irq,  void (*xack)(struct irq_data *));



/*

 * The NR_IRQs is divided between nodes, each of them has a separate irq space

 */

static inline int nlm_irq_to_xirq(int node, int irq)

{

	return node * NR_IRQS / NLM_NR_NODES + irq;

}



extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES];

extern int nlm_cpu_ready[];

#endif

#endif /* _NETLOGIC_COMMON_H_ */

arch/mips/include/asm/netlogic/mips-extns.h

+5 −0
Original line number Diff line number Diff line
@@ -73,4 +73,9 @@ static inline int hard_smp_processor_id(void) 
	return __read_32bit_c0_register($15, 1) & 0x3ff;

}



static inline int nlm_nodeid(void)

{

	return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;

}



#endif /*_ASM_NLM_MIPS_EXTS_H */

arch/mips/include/asm/netlogic/xlp-hal/pic.h

+0 −1
Original line number Diff line number Diff line
@@ -381,7 +381,6 @@ nlm_pic_init_irt(uint64_t base, int irt, int irq, int hwt) 
	nlm_pic_write_irt_direct(base, irt, 0, 0, 0, irq, hwt);

}



extern uint64_t nlm_pic_base;

int nlm_irq_to_irt(int irq);

int nlm_irt_to_irq(int irt);

arch/mips/include/asm/netlogic/xlp-hal/sys.h

+0 −1
Original line number Diff line number Diff line
@@ -124,6 +124,5 @@ 
#define	nlm_get_sys_pcibase(node) nlm_pcicfg_base(XLP_IO_SYS_OFFSET(node))

#define	nlm_get_sys_regbase(node) (nlm_get_sys_pcibase(node) + XLP_IO_PCI_HDRSZ)



extern uint64_t nlm_sys_base;

#endif

#endif

arch/mips/include/asm/netlogic/xlr/pic.h

+0 −2
Original line number Diff line number Diff line
@@ -258,7 +258,5 @@ nlm_pic_init_irt(uint64_t base, int irt, int irq, int hwt) 
	nlm_write_reg(base, PIC_IRT_1(irt),

		(1 << 30) | (1 << 6) | irq);

}



extern uint64_t nlm_pic_base;

#endif

#endif /* _ASM_NLM_XLR_PIC_H */