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Commit 778eeb1b authored by Steven J. Hill's avatar Steven J. Hill Committed by John Crispin
Browse files

MIPS: Add new GIC clocksource. 



Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.

Signed-off-by: default avatarSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 4cb764b4

arch/mips/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -296,6 +296,7 @@ config MIPS_MALTA 
	select BOOT_RAW

	select CEVT_R4K

	select CSRC_R4K

	select CSRC_GIC

	select DMA_NONCOHERENT

	select GENERIC_ISA_DMA

	select HAVE_PCSPKR_PLATFORM
@@ -928,6 +929,9 @@ config CSRC_POWERTV 
config CSRC_R4K

	bool



config CSRC_GIC

	bool



config CSRC_SB1250

	bool

arch/mips/include/asm/gic.h

+1 −0
Original line number Diff line number Diff line
@@ -359,6 +359,7 @@ struct gic_shared_intr_map { 
/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */

#define GIC_PIN_TO_VEC_OFFSET	(1)



extern int gic_present;

extern unsigned long _gic_base;

extern unsigned int gic_irq_base;

extern unsigned int gic_irq_flags[];

arch/mips/include/asm/time.h

+1 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ extern int init_r4k_clocksource(void); 


static inline int init_mips_clocksource(void)

{

#ifdef CONFIG_CSRC_R4K

#if defined(CONFIG_CSRC_R4K) && !defined(CONFIG_CSRC_GIC)

	return init_r4k_clocksource();

#else

	return 0;

arch/mips/kernel/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o 
obj-$(CONFIG_CSRC_POWERTV)	+= csrc-powertv.o

obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o

obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

obj-$(CONFIG_CSRC_GIC)		+= csrc-gic.o

obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o



obj-$(CONFIG_STACKTRACE)	+= stacktrace.o

arch/mips/kernel/csrc-gic.c

0 → 100644
+49 −0
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.

 */

#include <linux/clocksource.h>

#include <linux/init.h>



#include <asm/time.h>

#include <asm/gic.h>



static cycle_t gic_hpt_read(struct clocksource *cs)

{

	unsigned int hi, hi2, lo;



	do {

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), lo);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi2);

	} while (hi2 != hi);



	return (((cycle_t) hi) << 32) + lo;

}



static struct clocksource gic_clocksource = {

	.name	= "GIC",

	.read	= gic_hpt_read,

	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,

};



void __init gic_clocksource_init(unsigned int frequency)

{

	unsigned int config, bits;



	/* Calculate the clocksource mask. */

	GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), config);

	bits = 32 + ((config & GIC_SH_CONFIG_COUNTBITS_MSK) >>

		(GIC_SH_CONFIG_COUNTBITS_SHF - 2));



	/* Set clocksource mask. */

	gic_clocksource.mask = CLOCKSOURCE_MASK(bits);



	/* Calculate a somewhat reasonable rating value. */

	gic_clocksource.rating = 200 + frequency / 10000000;



	clocksource_register_hz(&gic_clocksource, frequency);

}