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Commit 774305d0 authored by Wolfram Sang's avatar Wolfram Sang Committed by Sascha Hauer
Browse files

arm: imx35: add esdhc-device to MX35-platform 



Signed-off-by: default avatarWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 203a0734

arch/arm/mach-mx3/clock-imx35.c

+3 −3
Original line number Diff line number Diff line
@@ -459,9 +459,9 @@ static struct clk_lookup lookups[] = { 
	_REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)

	_REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)

	_REGISTER_CLOCK(NULL, "esai", esai_clk)

	_REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk)

	_REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk)

	_REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk)

	_REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)

	_REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)

	_REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_clk)

	_REGISTER_CLOCK("fec.0", NULL, fec_clk)

	_REGISTER_CLOCK(NULL, "gpio", gpio1_clk)

	_REGISTER_CLOCK(NULL, "gpio", gpio2_clk)

arch/arm/mach-mx3/devices-imx35.h

+7 −0
Original line number Diff line number Diff line
@@ -41,3 +41,10 @@ extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; 
	imx_add_spi_imx(&imx35_cspi_data[id], pdata)

#define imx35_add_spi_imx0(pdata)	imx35_add_cspi(0, pdata)

#define imx35_add_spi_imx1(pdata)	imx35_add_cspi(1, pdata)



#define imx35_add_esdhc0(pdata)	\

	imx_add_esdhc(0, MX35_ESDHC1_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC1, pdata)

#define imx35_add_esdhc1(pdata)	\

	imx_add_esdhc(1, MX35_ESDHC2_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC2, pdata)

#define imx35_add_esdhc2(pdata)	\

	imx_add_esdhc(2, MX35_ESDHC3_BASE_ADDR, SZ_16K, MX35_INT_MMC_SDHC3, pdata)

arch/arm/plat-mxc/include/mach/mx35.h

+3 −0
Original line number Diff line number Diff line
@@ -52,6 +52,9 @@ 
#define MX35_GPIO3_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xa4000)

#define MX35_SCC_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xac000)

#define MX35_RNGA_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xb0000)

#define MX35_ESDHC1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xb4000)

#define MX35_ESDHC2_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xb8000)

#define MX35_ESDHC3_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xbc000)

#define MX35_IPU_CTRL_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xc0000)

#define MX35_AUDMUX_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xc4000)

#define MX35_GPIO1_BASE_ADDR			(MX35_AIPS2_BASE_ADDR + 0xcc000)