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Commit 7707df4a authored by Deepak S's avatar Deepak S Committed by Daniel Vetter
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drm/i915: Add RP1 render P state thresholds in CHV 



This is useful for userspace utilities to verify and micromanaging
the increase/decrease frequncy.

v2: Use vlv_gpu_freq to get freq (Deepak)

Signed-off-by: default avatarDeepak S <deepak.s@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3497a562

drivers/gpu/drm/i915/intel_pm.c

+15 −0
Original line number Diff line number Diff line
@@ -3803,6 +3803,16 @@ static int cherryview_rps_rpe_freq(struct drm_i915_private *dev_priv) 
	return rpe;

}



static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv)

{

	u32 val, rp1;



	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);

	rp1 = (val >> PUNIT_GPU_STATUS_MAX_FREQ_SHIFT) & PUNIT_GPU_STATUS_MAX_FREQ_MASK;



	return rp1;

}



static int cherryview_rps_min_freq(struct drm_i915_private *dev_priv)

{

	u32 val, rpn;
@@ -4004,6 +4014,11 @@ static void cherryview_init_gt_powersave(struct drm_device *dev) 
			 vlv_gpu_freq(dev_priv, dev_priv->rps.efficient_freq),

			 dev_priv->rps.efficient_freq);



	dev_priv->rps.rp1_freq = cherryview_rps_guar_freq(dev_priv);

	DRM_DEBUG_DRIVER("RP1(Guar) GPU freq: %d MHz (%u)\n",

			 vlv_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),

			 dev_priv->rps.rp1_freq);



	dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);

	DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",

			 vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq),