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Commit 769af6c5 authored by Mitchel Humpherys's avatar Mitchel Humpherys
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iommu/arm-smmu: Move device config probe messages to debug level



The device config probe messages are for informational purposes only.
Move them to debug level to avoid spamming the boot log unnecessarily.

CRs-Fixed: 918584
Change-Id: If9085e2165f26b66ff94b258894f01471be82a5b
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
parent 41747adc
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+19 −19
Original line number Diff line number Diff line
@@ -506,7 +506,7 @@ static void parse_driver_options(struct arm_smmu_device *smmu)
		if (of_property_read_bool(smmu->dev->of_node,
						arm_smmu_options[i].prop)) {
			smmu->options |= arm_smmu_options[i].opt;
			dev_notice(smmu->dev, "option %s\n",
			dev_dbg(smmu->dev, "option %s\n",
				arm_smmu_options[i].prop);
		}
	} while (arm_smmu_options[++i].opt);
@@ -3008,8 +3008,8 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
	void __iomem *gr0_base = ARM_SMMU_GR0(smmu);
	u32 id;

	dev_notice(smmu->dev, "probing hardware configuration...\n");
	dev_notice(smmu->dev, "SMMUv%d with:\n", smmu->version);
	dev_dbg(smmu->dev, "probing hardware configuration...\n");
	dev_dbg(smmu->dev, "SMMUv%d with:\n", smmu->version);

	/* ID0 */
	id = readl_relaxed(gr0_base + ARM_SMMU_GR0_ID0);
@@ -3022,17 +3022,17 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)

	if (id & ID0_S1TS) {
		smmu->features |= ARM_SMMU_FEAT_TRANS_S1;
		dev_notice(smmu->dev, "\tstage 1 translation\n");
		dev_dbg(smmu->dev, "\tstage 1 translation\n");
	}

	if (id & ID0_S2TS) {
		smmu->features |= ARM_SMMU_FEAT_TRANS_S2;
		dev_notice(smmu->dev, "\tstage 2 translation\n");
		dev_dbg(smmu->dev, "\tstage 2 translation\n");
	}

	if (id & ID0_NTS) {
		smmu->features |= ARM_SMMU_FEAT_TRANS_NESTED;
		dev_notice(smmu->dev, "\tnested translation\n");
		dev_dbg(smmu->dev, "\tnested translation\n");
	}

	if (!(smmu->features &
@@ -3043,12 +3043,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)

	if (smmu->version == 1 || (!(id & ID0_ATOSNS) && (id & ID0_S1TS))) {
		smmu->features |= ARM_SMMU_FEAT_TRANS_OPS;
		dev_notice(smmu->dev, "\taddress translation ops\n");
		dev_dbg(smmu->dev, "\taddress translation ops\n");
	}

	if (id & ID0_CTTW) {
		smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK;
		dev_notice(smmu->dev, "\tcoherent table walk\n");
		dev_dbg(smmu->dev, "\tcoherent table walk\n");
	}

	if (id & ID0_SMS) {
@@ -3079,7 +3079,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
			}
		}

		dev_notice(smmu->dev,
		dev_dbg(smmu->dev,
			"\tstream matching with %u register groups, mask 0x%x",
			smmu->num_mapping_groups, mask);
	} else {
@@ -3105,7 +3105,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
		dev_err(smmu->dev, "impossible number of S2 context banks!\n");
		return -ENODEV;
	}
	dev_notice(smmu->dev, "\t%u context banks (%u stage-2 only)\n",
	dev_dbg(smmu->dev, "\t%u context banks (%u stage-2 only)\n",
		smmu->num_context_banks, smmu->num_s2_context_banks);

	/* ID2 */
@@ -3144,14 +3144,14 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
	}

	arm_smmu_ops.pgsize_bitmap &= size;
	dev_notice(smmu->dev, "\tSupported page sizes: 0x%08lx\n", size);
	dev_dbg(smmu->dev, "\tSupported page sizes: 0x%08lx\n", size);

	if (smmu->features & ARM_SMMU_FEAT_TRANS_S1)
		dev_notice(smmu->dev, "\tStage-1: %lu-bit VA -> %lu-bit IPA\n",
		dev_dbg(smmu->dev, "\tStage-1: %lu-bit VA -> %lu-bit IPA\n",
			smmu->va_size, smmu->ipa_size);

	if (smmu->features & ARM_SMMU_FEAT_TRANS_S2)
		dev_notice(smmu->dev, "\tStage-2: %lu-bit IPA -> %lu-bit PA\n",
		dev_dbg(smmu->dev, "\tStage-2: %lu-bit IPA -> %lu-bit PA\n",
			smmu->ipa_size, smmu->pa_size);

	return 0;
@@ -3240,7 +3240,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
	if (err)
		goto out_put_masters;

	dev_notice(dev, "registered %d master devices\n", num_masters);
	dev_dbg(dev, "registered %d master devices\n", num_masters);

	err = arm_smmu_parse_impl_def_registers(smmu);
	if (err)