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Commit 7544f88b authored by Srinu Gorle's avatar Srinu Gorle
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msm: vidc: Overwrite turbo frequency, if speed bin is present



Add support to read the efuse register to identify the bin
and overwrite venus turbo frequency in allowed clock rates table.

CRs-Fixed: 2003376
Change-Id: If4845a5a61d7ab9f7e9cdc1b18fde730ac402b10
Signed-off-by: default avatarSrinu Gorle <sgorle@codeaurora.org>
parent be05b187
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+6 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ Required properties:
  of macroblocks per second. The load is a reflection of hardware capability
  rather than a performance guarantee. Performance is guaranteed only up to
  advertised capability of the chipset.
- qcom,venus-uplift-freq: Frequency which needs to be considered when respective
  efuse bits are identified.
- qcom,firmware-name : firmware file name to be downloaded.

Optional properties:
@@ -19,6 +21,8 @@ Optional properties:
    in efuse register.
- qcom,capability-version : mask and shift of the capability version bits
    in efuse register.
- qcom,speedbin-version : mask and shift of speedbin version bits.
    in efuse register.
- qcom,load-freq-tbl : load (in macroblocks/sec) and corresponding vcodec
  clock required along with codec's config, which is a bitmap that describes
  what the clock is used for. The bitmaps are as follows:
@@ -190,6 +194,8 @@ Example:
	qcom,vidc@fdc00000 {
		compatible = "qcom,msm-vidc";
		reg = <0xfdc00000 0xff000>;
		qcom,venus-uplift-freq = <540000000>;
		qcom,speedbin-version = <0x7 0x8>;
		interrupts = <0 44 0>;
		venus-supply = <&gdsc>;
		venus-core0-supply = <&gdsc1>;
+68 −0
Original line number Diff line number Diff line
@@ -426,6 +426,72 @@ static int msm_vidc_load_capability_version_table(
	return 0;
}

static void clock_override(struct platform_device *pdev,
	struct msm_vidc_platform_resources *platform_res,
	struct allowed_clock_rates_table *clk_table)
{
	struct resource *res;
	void __iomem *base;
	u32 config_efuse, bin;
	u32 venus_uplift_freq;
	u32 is_speed_bin = 7;
	int rc = 0;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
			"efuse");
	if (!res) {
		dprintk(VIDC_DBG,
			"Failed to get resource efuse\n");
		return;
	}

	rc = of_property_read_u32(pdev->dev.of_node, "qcom,venus-uplift-freq",
			&venus_uplift_freq);
	if (rc) {
		dprintk(VIDC_DBG,
			"Failed to determine venus-uplift-freq: %d\n", rc);
		return;
	}

	if (!of_find_property(pdev->dev.of_node,
		"qcom,speedbin-version", NULL)) {
		dprintk(VIDC_DBG, "qcom,speedbin-version not found\n");
		return;
	}

	rc = msm_vidc_load_u32_table(pdev, pdev->dev.of_node,
		"qcom,speedbin-version",
		sizeof(*platform_res->pf_speedbin_tbl),
		(u32 **)&platform_res->pf_speedbin_tbl,
		NULL);
	if (rc) {
		dprintk(VIDC_ERR,
			"%s: failed to read speedbin version table\n",
			__func__);
		return;
	}

	base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
	if (!base) {
		dev_warn(&pdev->dev,
			"Unable to ioremap efuse reg address. Defaulting to 0.\n");
		return;
	}

	config_efuse = readl_relaxed(base);
	devm_iounmap(&pdev->dev, base);

	bin = (config_efuse >> platform_res->pf_speedbin_tbl->version_shift) &
		platform_res->pf_speedbin_tbl->version_mask;

	if (bin == is_speed_bin) {
		dprintk(VIDC_DBG,
			"Venus speed binning available overwriting %d to %d\n",
			clk_table[0].clock_rate, venus_uplift_freq);
		clk_table[0].clock_rate = venus_uplift_freq;
	}
}

static int msm_vidc_load_allowed_clocks_table(
		struct msm_vidc_platform_resources *res)
{
@@ -448,6 +514,8 @@ static int msm_vidc_load_allowed_clocks_table(
			"%s: failed to read allowed clocks table\n", __func__);
		return rc;
	}
	if (res->allowed_clks_tbl_size)
		clock_override(pdev, res, res->allowed_clks_tbl);

	return 0;
}
+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ struct msm_vidc_platform_resources {
	uint32_t irq;
	struct version_table *pf_ver_tbl;
	struct version_table *pf_cap_tbl;
	struct version_table *pf_speedbin_tbl;
	struct allowed_clock_rates_table *allowed_clks_tbl;
	u32 allowed_clks_tbl_size;
	struct clock_freq_table clock_freq_tbl;