Commit 7530584f authored Jan 29, 2015 by Christian König Committed by Greg Kroah-Hartman Feb 11, 2015

drm/radeon: fix PLLs on RS880 and older v2

commit 72edd83cc9e5819ed1ee771519143d7594e059f0 upstream.

This is a workaround for RS880 and older chips which seem to have
an additional limit on the minimum PLL input frequency.

v2: fix signed/unsigned warning

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=91861
https://bugzilla.kernel.org/show_bug.cgi?id=83461



Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 2a1398b3

drivers/gpu/drm/radeon/radeon_display.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -959,6 +959,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
		if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&
		pll->flags & RADEON_PLL_USE_REF_DIV)
		ref_div_max = pll->reference_div;
		else if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP)
		/* fix for problems on RS880 */
		ref_div_max = min(pll->max_ref_div, 7u);
		else
		ref_div_max = pll->max_ref_div;