Loading arch/arm/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -810,6 +810,8 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select GENERIC_TIME config PLAT_ORION bool Loading arch/arm/include/asm/hardware/iop3xx.h +17 −1 Original line number Diff line number Diff line Loading @@ -234,7 +234,13 @@ extern int iop3xx_get_init_atu(void); void iop3xx_map_io(void); void iop_init_cp6_handler(void); void iop_init_time(unsigned long tickrate); unsigned long iop_gettimeoffset(void); static inline u32 read_tmr0(void) { u32 val; asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); return val; } static inline void write_tmr0(u32 val) { Loading @@ -253,6 +259,11 @@ static inline u32 read_tcr0(void) return val; } static inline void write_tcr0(u32 val) { asm volatile("mcr p6, 0, %0, c2, c1, 0" : : "r" (val)); } static inline u32 read_tcr1(void) { u32 val; Loading @@ -260,6 +271,11 @@ static inline u32 read_tcr1(void) return val; } static inline void write_tcr1(u32 val) { asm volatile("mcr p6, 0, %0, c3, c1, 0" : : "r" (val)); } static inline void write_trr0(u32 val) { asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); Loading arch/arm/mach-iop13xx/include/mach/time.h +17 −1 Original line number Diff line number Diff line Loading @@ -20,7 +20,6 @@ #define IOP13XX_CORE_FREQ_1200 (5 << 16) void iop_init_time(unsigned long tickrate); unsigned long iop_gettimeoffset(void); static inline unsigned long iop13xx_core_freq(void) { Loading Loading @@ -66,6 +65,13 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void) return 2; } static inline u32 read_tmr0(void) { u32 val; asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val)); return val; } static inline void write_tmr0(u32 val) { asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); Loading @@ -83,6 +89,11 @@ static inline u32 read_tcr0(void) return val; } static inline void write_tcr0(u32 val) { asm volatile("mcr p6, 0, %0, c2, c9, 0" : : "r" (val)); } static inline u32 read_tcr1(void) { u32 val; Loading @@ -90,6 +101,11 @@ static inline u32 read_tcr1(void) return val; } static inline void write_tcr1(u32 val) { asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val)); } static inline void write_trr0(u32 val) { asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); Loading arch/arm/mach-iop13xx/iq81340mc.c +0 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,6 @@ static void __init iq81340mc_timer_init(void) static struct sys_timer iq81340mc_timer = { .init = iq81340mc_timer_init, .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340MC, "Intel IQ81340MC") Loading arch/arm/mach-iop13xx/iq81340sc.c +0 −1 Original line number Diff line number Diff line Loading @@ -89,7 +89,6 @@ static void __init iq81340sc_timer_init(void) static struct sys_timer iq81340sc_timer = { .init = iq81340sc_timer_init, .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340SC, "Intel IQ81340SC") Loading Loading
arch/arm/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -810,6 +810,8 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select GENERIC_TIME config PLAT_ORION bool Loading
arch/arm/include/asm/hardware/iop3xx.h +17 −1 Original line number Diff line number Diff line Loading @@ -234,7 +234,13 @@ extern int iop3xx_get_init_atu(void); void iop3xx_map_io(void); void iop_init_cp6_handler(void); void iop_init_time(unsigned long tickrate); unsigned long iop_gettimeoffset(void); static inline u32 read_tmr0(void) { u32 val; asm volatile("mrc p6, 0, %0, c0, c1, 0" : "=r" (val)); return val; } static inline void write_tmr0(u32 val) { Loading @@ -253,6 +259,11 @@ static inline u32 read_tcr0(void) return val; } static inline void write_tcr0(u32 val) { asm volatile("mcr p6, 0, %0, c2, c1, 0" : : "r" (val)); } static inline u32 read_tcr1(void) { u32 val; Loading @@ -260,6 +271,11 @@ static inline u32 read_tcr1(void) return val; } static inline void write_tcr1(u32 val) { asm volatile("mcr p6, 0, %0, c3, c1, 0" : : "r" (val)); } static inline void write_trr0(u32 val) { asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); Loading
arch/arm/mach-iop13xx/include/mach/time.h +17 −1 Original line number Diff line number Diff line Loading @@ -20,7 +20,6 @@ #define IOP13XX_CORE_FREQ_1200 (5 << 16) void iop_init_time(unsigned long tickrate); unsigned long iop_gettimeoffset(void); static inline unsigned long iop13xx_core_freq(void) { Loading Loading @@ -66,6 +65,13 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void) return 2; } static inline u32 read_tmr0(void) { u32 val; asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val)); return val; } static inline void write_tmr0(u32 val) { asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); Loading @@ -83,6 +89,11 @@ static inline u32 read_tcr0(void) return val; } static inline void write_tcr0(u32 val) { asm volatile("mcr p6, 0, %0, c2, c9, 0" : : "r" (val)); } static inline u32 read_tcr1(void) { u32 val; Loading @@ -90,6 +101,11 @@ static inline u32 read_tcr1(void) return val; } static inline void write_tcr1(u32 val) { asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val)); } static inline void write_trr0(u32 val) { asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); Loading
arch/arm/mach-iop13xx/iq81340mc.c +0 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,6 @@ static void __init iq81340mc_timer_init(void) static struct sys_timer iq81340mc_timer = { .init = iq81340mc_timer_init, .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340MC, "Intel IQ81340MC") Loading
arch/arm/mach-iop13xx/iq81340sc.c +0 −1 Original line number Diff line number Diff line Loading @@ -89,7 +89,6 @@ static void __init iq81340sc_timer_init(void) static struct sys_timer iq81340sc_timer = { .init = iq81340sc_timer_init, .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340SC, "Intel IQ81340SC") Loading