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Commit 74919824 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge 3.18.78 into android-3.18



Changes in 3.18.78
	USB: devio: Revert "USB: devio: Don't corrupt user memory"
	USB: core: fix out-of-bounds access bug in usb_get_bos_descriptor()
	USB: serial: metro-usb: add MS7820 device id
	usb: cdc_acm: Add quirk for Elatec TWN3
	usb: quirks: add quirk for WORLDE MINI MIDI keyboard
	usb: hub: Allow reset retry for USB2 devices on connect bounce
	can: gs_usb: fix busy loop if no more TX context is available
	can: esd_usb2: Fix can_dlc value for received RTR, frames
	ALSA: seq: Enable 'use' locking in all configurations
	ALSA: hda: Remove superfluous '-' added by printk conversion
	i2c: ismt: Separate I2C block read from SMBus block read
	brcmsmac: make some local variables 'static const' to reduce stack size
	bus: mbus: fix window size calculation for 4GB windows
	KEYS: encrypted: fix dereference of NULL user_key_payload
	lib/digsig: fix dereference of NULL user_key_payload
	KEYS: don't let add_key() update an uninstantiated key
	cls_api.c: Fix dumping of non-existing actions' stats.
	parisc: Avoid trashing sr2 and sr3 in LWS code
	parisc: Fix double-word compare and exchange in LWS code on 32-bit kernels
	af_packet: don't pass empty blocks for PACKET_V3
	FS-Cache: fix dereference of NULL user_key_payload
	Linux 3.18.78

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents ca1f6a05 b44ef85f
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+1 −1
Original line number Diff line number Diff line
VERSION = 3
PATCHLEVEL = 18
SUBLEVEL = 77
SUBLEVEL = 78
EXTRAVERSION =
NAME = Diseased Newt

+25 −30
Original line number Diff line number Diff line
@@ -479,11 +479,6 @@ lws_start:
	comiclr,>>	__NR_lws_entries, %r20, %r0
	b,n	lws_exit_nosys

	/* WARNING: Trashing sr2 and sr3 */
	mfsp	%sr7,%r1			/* get userspace into sr3 */
	mtsp	%r1,%sr3
	mtsp	%r0,%sr2			/* get kernel space into sr2 */

	/* Load table start */
	ldil	L%lws_table, %r1
	ldo	R%lws_table(%r1), %r28	/* Scratch use of r28 */
@@ -632,9 +627,9 @@ cas_action:
	stw	%r1, 4(%sr2,%r20)
#endif
	/* The load and store could fail */
1:	ldw,ma	0(%sr3,%r26), %r28
1:	ldw,ma	0(%r26), %r28
	sub,<>	%r28, %r25, %r0
2:	stw,ma	%r24, 0(%sr3,%r26)
2:	stw,ma	%r24, 0(%r26)
	/* Free lock */
	stw,ma	%r20, 0(%sr2,%r20)
#if ENABLE_LWS_DEBUG
@@ -711,9 +706,9 @@ lws_compare_and_swap_2:
	nop

	/* 8bit load */
4:	ldb	0(%sr3,%r25), %r25
4:	ldb	0(%r25), %r25
	b	cas2_lock_start
5:	ldb	0(%sr3,%r24), %r24
5:	ldb	0(%r24), %r24
	nop
	nop
	nop
@@ -721,9 +716,9 @@ lws_compare_and_swap_2:
	nop

	/* 16bit load */
6:	ldh	0(%sr3,%r25), %r25
6:	ldh	0(%r25), %r25
	b	cas2_lock_start
7:	ldh	0(%sr3,%r24), %r24
7:	ldh	0(%r24), %r24
	nop
	nop
	nop
@@ -731,9 +726,9 @@ lws_compare_and_swap_2:
	nop

	/* 32bit load */
8:	ldw	0(%sr3,%r25), %r25
8:	ldw	0(%r25), %r25
	b	cas2_lock_start
9:	ldw	0(%sr3,%r24), %r24
9:	ldw	0(%r24), %r24
	nop
	nop
	nop
@@ -742,14 +737,14 @@ lws_compare_and_swap_2:

	/* 64bit load */
#ifdef CONFIG_64BIT
10:	ldd	0(%sr3,%r25), %r25
11:	ldd	0(%sr3,%r24), %r24
10:	ldd	0(%r25), %r25
11:	ldd	0(%r24), %r24
#else
	/* Load new value into r22/r23 - high/low */
10:	ldw	0(%sr3,%r25), %r22
11:	ldw	4(%sr3,%r25), %r23
	/* Load old value into r22/r23 - high/low */
10:	ldw	0(%r25), %r22
11:	ldw	4(%r25), %r23
	/* Load new value into fr4 for atomic store later */
12:	flddx	0(%sr3,%r24), %fr4
12:	flddx	0(%r24), %fr4
#endif

cas2_lock_start:
@@ -799,30 +794,30 @@ cas2_action:
	ldo	1(%r0),%r28

	/* 8bit CAS */
13:	ldb,ma	0(%sr3,%r26), %r29
13:	ldb,ma	0(%r26), %r29
	sub,=	%r29, %r25, %r0
	b,n	cas2_end
14:	stb,ma	%r24, 0(%sr3,%r26)
14:	stb,ma	%r24, 0(%r26)
	b	cas2_end
	copy	%r0, %r28
	nop
	nop

	/* 16bit CAS */
15:	ldh,ma	0(%sr3,%r26), %r29
15:	ldh,ma	0(%r26), %r29
	sub,=	%r29, %r25, %r0
	b,n	cas2_end
16:	sth,ma	%r24, 0(%sr3,%r26)
16:	sth,ma	%r24, 0(%r26)
	b	cas2_end
	copy	%r0, %r28
	nop
	nop

	/* 32bit CAS */
17:	ldw,ma	0(%sr3,%r26), %r29
17:	ldw,ma	0(%r26), %r29
	sub,=	%r29, %r25, %r0
	b,n	cas2_end
18:	stw,ma	%r24, 0(%sr3,%r26)
18:	stw,ma	%r24, 0(%r26)
	b	cas2_end
	copy	%r0, %r28
	nop
@@ -830,22 +825,22 @@ cas2_action:

	/* 64bit CAS */
#ifdef CONFIG_64BIT
19:	ldd,ma	0(%sr3,%r26), %r29
19:	ldd,ma	0(%r26), %r29
	sub,*=	%r29, %r25, %r0
	b,n	cas2_end
20:	std,ma	%r24, 0(%sr3,%r26)
20:	std,ma	%r24, 0(%r26)
	copy	%r0, %r28
#else
	/* Compare first word */
19:	ldw,ma	0(%sr3,%r26), %r29
19:	ldw	0(%r26), %r29
	sub,=	%r29, %r22, %r0
	b,n	cas2_end
	/* Compare second word */
20:	ldw,ma	4(%sr3,%r26), %r29
20:	ldw	4(%r26), %r29
	sub,=	%r29, %r23, %r0
	b,n	cas2_end
	/* Perform the store */
21:	fstdx	%fr4, 0(%sr3,%r26)
21:	fstdx	%fr4, 0(%r26)
	copy	%r0, %r28
#endif

+1 −1
Original line number Diff line number Diff line
@@ -523,7 +523,7 @@ mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
			if (mbus->hw_io_coherency)
				w->mbus_attr |= ATTR_HW_COHERENCY;
			w->base = base & DDR_BASE_CS_LOW_MASK;
			w->size = (size | ~DDR_SIZE_MASK) + 1;
			w->size = (u64)(size | ~DDR_SIZE_MASK) + 1;
		}
	}
	mvebu_mbus_dram_info.num_cs = cs;
+4 −1
Original line number Diff line number Diff line
@@ -339,12 +339,15 @@ static int ismt_process_desc(const struct ismt_desc *desc,
			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
			break;
		case I2C_SMBUS_BLOCK_DATA:
		case I2C_SMBUS_I2C_BLOCK_DATA:
			if (desc->rxbytes != dma_buffer[0] + 1)
				return -EMSGSIZE;

			memcpy(data->block, dma_buffer, desc->rxbytes);
			break;
		case I2C_SMBUS_I2C_BLOCK_DATA:
			memcpy(&data->block[1], dma_buffer, desc->rxbytes);
			data->block[0] = desc->rxbytes;
			break;
		}
		return 0;
	}
+1 −1
Original line number Diff line number Diff line
@@ -334,7 +334,7 @@ static void esd_usb2_rx_can_msg(struct esd_usb2_net_priv *priv,
		}

		cf->can_id = id & ESD_IDMASK;
		cf->can_dlc = get_can_dlc(msg->msg.rx.dlc);
		cf->can_dlc = get_can_dlc(msg->msg.rx.dlc & ~ESD_RTR);

		if (id & ESD_EXTID)
			cf->can_id |= CAN_EFF_FLAG;
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