Merge branch 'for-next' of...

capella	Capella Microsystems, Inc

cavium	Cavium, Inc.

cdns	Cadence Design Systems Inc.

chipidea	Chipidea, Inc

chrp	Common Hardware Reference Platform

chunghwa	Chunghwa Picture Tubes Ltd.

cirrus	Cirrus Logic, Inc.

ebv	EBV Elektronik

edt	Emerging Display Technologies

emmicro	EM Microelectronic

energymicro	Silicon Laboratories (formerly Energy Micro AS)

epcos	EPCOS AG

epfl	Ecole Polytechnique Fédérale de Lausanne

epson	Seiko Epson Corp.

gmt	Global Mixed-mode Technology, Inc.

google	Google, Inc.

gumstix	Gumstix, Inc.

gw	Gateworks Corporation

haoyu	Haoyu Microelectronic Co. Ltd.

hisilicon	Hisilicon Limited.

honeywell	Honeywell

idt	Integrated Device Technologies, Inc.

iom	Iomega Corporation

img	Imagination Technologies Ltd.

innolux	Innolux Corporation

intel	Intel Corporation

intercontrol	Inter Control Group

isee	ISEE 2007 S.L.

simtek

sii	Seiko Instruments, Inc.

sirf	SiRF Technology, Inc.

sitronix	Sitronix Technology Corporation

smsc	Standard Microsystems Corporation

snps 	Synopsys, Inc.

solidrun	SolidRun

  VIII - Specifying device power management information (sleep property)

  IX - Specifying dma bus information

  Appendix A - Sample SOC node for MPC8540

(similar to an interrupt nexus, except that defining a standardized

sleep-map should wait until its necessity is demonstrated).

IX - Specifying dma bus information

Some devices may have DMA memory range shifted relatively to the beginning of

RAM, or even placed outside of kernel RAM. For example, the Keystone 2 SoC

worked in LPAE mode with 4G memory has:

- RAM range: [0x8 0000 0000, 0x8 FFFF FFFF]

- DMA range: [  0x8000 0000,   0xFFFF FFFF]

and DMA range is aliased into first 2G of RAM in HW.

In such cases, DMA addresses translation should be performed between CPU phys

and DMA addresses. The "dma-ranges" property is intended to be used

for describing the configuration of such system in DT.

In addition, each DMA master device on the DMA bus may or may not support

coherent DMA operations. The "dma-coherent" property is intended to be used

for identifying devices supported coherent DMA operations in DT.

* DMA Bus master

Optional property:

- dma-ranges: <prop-encoded-array> encoded as arbitrary number of triplets of

	(child-bus-address, parent-bus-address, length). Each triplet specified

	describes a contiguous DMA address range.

	The dma-ranges property is used to describe the direct memory access (DMA)

	structure of a memory-mapped bus whose device tree parent can be accessed

	from DMA operations originating from the bus. It provides a means of

	defining a mapping or translation between the physical address space of

	the bus and the physical address space of the parent of the bus.

	(for more information see ePAPR specification)

* DMA Bus child

Optional property:

- dma-ranges: <empty> value. if present - It means that DMA addresses

	translation has to be enabled for this device.

- dma-coherent: Present if dma operations are coherent

Example:

soc {

		compatible = "ti,keystone","simple-bus";

		ranges = <0x0 0x0 0x0 0xc0000000>;

		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;

		[...]

		usb: usb@2680000 {

			compatible = "ti,keystone-dwc3";

			[...]

			dma-coherent;

		};

};

Appendix A - Sample SOC node for MPC8540

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