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Commit 72bcb269 authored by Chris Wilson's avatar Chris Wilson Committed by Eric Anholt
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drm/i915/suspend: Flush register writes before busy-waiting. 



Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent d5dd96cb

drivers/gpu/drm/i915/i915_suspend.c

+18 −9
Original line number Diff line number Diff line
@@ -395,16 +395,20 @@ static void i915_restore_modeset_reg(struct drm_device *dev) 
	if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {

		I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &

			   ~DPLL_VCO_ENABLE);

		DRM_UDELAY(150);

		POSTING_READ(dpll_a_reg);

		udelay(150);

	}

	I915_WRITE(fpa0_reg, dev_priv->saveFPA0);

	I915_WRITE(fpa1_reg, dev_priv->saveFPA1);

	/* Actually enable it */

	I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);

	DRM_UDELAY(150);

	if (IS_I965G(dev) && !IS_IRONLAKE(dev))

	POSTING_READ(dpll_a_reg);

	udelay(150);

	if (IS_I965G(dev) && !IS_IRONLAKE(dev)) {

		I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);

	DRM_UDELAY(150);

		POSTING_READ(DPLL_A_MD);

	}

	udelay(150);



	/* Restore mode */

	I915_WRITE(HTOTAL_A, dev_priv->saveHTOTAL_A);
@@ -460,16 +464,20 @@ static void i915_restore_modeset_reg(struct drm_device *dev) 
	if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {

		I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &

			   ~DPLL_VCO_ENABLE);

		DRM_UDELAY(150);

		POSTING_READ(dpll_b_reg);

		udelay(150);

	}

	I915_WRITE(fpb0_reg, dev_priv->saveFPB0);

	I915_WRITE(fpb1_reg, dev_priv->saveFPB1);

	/* Actually enable it */

	I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);

	DRM_UDELAY(150);

	if (IS_I965G(dev) && !IS_IRONLAKE(dev))

	POSTING_READ(dpll_b_reg);

	udelay(150);

	if (IS_I965G(dev) && !IS_IRONLAKE(dev)) {

		I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);

	DRM_UDELAY(150);

		POSTING_READ(DPLL_B_MD);

	}

	udelay(150);



	/* Restore mode */

	I915_WRITE(HTOTAL_B, dev_priv->saveHTOTAL_B);
@@ -730,7 +738,8 @@ void i915_restore_display(struct drm_device *dev) 
	I915_WRITE(VGA0, dev_priv->saveVGA0);

	I915_WRITE(VGA1, dev_priv->saveVGA1);

	I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);

	DRM_UDELAY(150);

	POSTING_READ(VGA_PD);

	udelay(150);



	i915_restore_vga(dev);

}