Loading arch/arm/include/asm/mach/arch.h +1 −2 Original line number Diff line number Diff line Loading @@ -12,7 +12,6 @@ struct tag; struct meminfo; struct sys_timer; struct pt_regs; struct smp_operations; #ifdef CONFIG_SMP Loading Loading @@ -48,7 +47,7 @@ struct machine_desc { void (*map_io)(void);/* IO mapping function */ void (*init_early)(void); void (*init_irq)(void); struct sys_timer *timer; /* system tick timer */ void (*init_time)(void); void (*init_machine)(void); void (*init_late)(void); #ifdef CONFIG_MULTI_IRQ_HANDLER Loading arch/arm/include/asm/mach/time.h +0 −30 Original line number Diff line number Diff line Loading @@ -10,36 +10,6 @@ #ifndef __ASM_ARM_MACH_TIME_H #define __ASM_ARM_MACH_TIME_H /* * This is our kernel timer structure. * * - init * Initialise the kernels jiffy timer source, claim interrupt * using setup_irq. This is called early on during initialisation * while interrupts are still disabled on the local CPU. * - suspend * Suspend the kernel jiffy timer source, if necessary. This * is called with interrupts disabled, after all normal devices * have been suspended. If no action is required, set this to * NULL. * - resume * Resume the kernel jiffy timer source, if necessary. This * is called with interrupts disabled before any normal devices * are resumed. If no action is required, set this to NULL. * - offset * Return the timer offset in microseconds since the last timer * interrupt. Note: this must take account of any unprocessed * timer interrupt which may be pending. */ struct sys_timer { void (*init)(void); void (*suspend)(void); void (*resume)(void); #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET unsigned long (*offset)(void); #endif }; extern void timer_tick(void); struct timespec; Loading arch/arm/kernel/time.c +1 −52 Original line number Diff line number Diff line Loading @@ -21,7 +21,6 @@ #include <linux/timex.h> #include <linux/errno.h> #include <linux/profile.h> #include <linux/syscore_ops.h> #include <linux/timer.h> #include <linux/irq.h> Loading @@ -31,11 +30,6 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> /* * Our system timer. */ static struct sys_timer *system_timer; #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) /* this needs a better home */ Loading Loading @@ -69,16 +63,6 @@ unsigned long profile_pc(struct pt_regs *regs) EXPORT_SYMBOL(profile_pc); #endif #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET u32 arch_gettimeoffset(void) { if (system_timer->offset != NULL) return system_timer->offset() * 1000; return 0; } #endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */ #ifndef CONFIG_GENERIC_CLOCKEVENTS /* * Kernel system timer support. Loading Loading @@ -129,43 +113,8 @@ int __init register_persistent_clock(clock_access_fn read_boot, return -EINVAL; } #if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS) static int timer_suspend(void) { if (system_timer->suspend) system_timer->suspend(); return 0; } static void timer_resume(void) { if (system_timer->resume) system_timer->resume(); } #else #define timer_suspend NULL #define timer_resume NULL #endif static struct syscore_ops timer_syscore_ops = { .suspend = timer_suspend, .resume = timer_resume, }; static int __init timer_init_syscore_ops(void) { register_syscore_ops(&timer_syscore_ops); return 0; } device_initcall(timer_init_syscore_ops); void __init time_init(void) { system_timer = machine_desc->timer; system_timer->init(); machine_desc->init_time(); sched_clock_postinit(); } arch/arm/mach-at91/at91rm9200_time.c +0 −5 Original line number Diff line number Diff line Loading @@ -274,8 +274,3 @@ void __init at91rm9200_timer_init(void) /* register clocksource */ clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); } struct sys_timer at91rm9200_timer = { .init = at91rm9200_timer_init, }; arch/arm/mach-at91/at91sam926x_time.c +27 −26 Original line number Diff line number Diff line Loading @@ -104,12 +104,38 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) } } static void at91sam926x_pit_suspend(struct clock_event_device *cedev) { /* Disable timer */ pit_write(AT91_PIT_MR, 0); } static void at91sam926x_pit_reset(void) { /* Disable timer and irqs */ pit_write(AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); } static void at91sam926x_pit_resume(struct clock_event_device *cedev) { at91sam926x_pit_reset(); } static struct clock_event_device pit_clkevt = { .name = "pit", .features = CLOCK_EVT_FEAT_PERIODIC, .shift = 32, .rating = 100, .set_mode = pit_clkevt_mode, .suspend = at91sam926x_pit_suspend, .resume = at91sam926x_pit_resume, }; Loading Loading @@ -150,19 +176,6 @@ static struct irqaction at91sam926x_pit_irq = { .irq = NR_IRQS_LEGACY + AT91_ID_SYS, }; static void at91sam926x_pit_reset(void) { /* Disable timer and irqs */ pit_write(AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); } #ifdef CONFIG_OF static struct of_device_id pit_timer_ids[] = { { .compatible = "atmel,at91sam9260-pit" }, Loading Loading @@ -211,7 +224,7 @@ static int __init of_at91sam926x_pit_init(void) /* * Set up both clocksource and clockevent support. */ static void __init at91sam926x_pit_init(void) void __init at91sam926x_pit_init(void) { unsigned long pit_rate; unsigned bits; Loading Loading @@ -250,12 +263,6 @@ static void __init at91sam926x_pit_init(void) clockevents_register_device(&pit_clkevt); } static void at91sam926x_pit_suspend(void) { /* Disable timer */ pit_write(AT91_PIT_MR, 0); } void __init at91sam926x_ioremap_pit(u32 addr) { #if defined(CONFIG_OF) Loading @@ -272,9 +279,3 @@ void __init at91sam926x_ioremap_pit(u32 addr) if (!pit_base_addr) panic("Impossible to ioremap PIT\n"); } struct sys_timer at91sam926x_timer = { .init = at91sam926x_pit_init, .suspend = at91sam926x_pit_suspend, .resume = at91sam926x_pit_reset, }; Loading
arch/arm/include/asm/mach/arch.h +1 −2 Original line number Diff line number Diff line Loading @@ -12,7 +12,6 @@ struct tag; struct meminfo; struct sys_timer; struct pt_regs; struct smp_operations; #ifdef CONFIG_SMP Loading Loading @@ -48,7 +47,7 @@ struct machine_desc { void (*map_io)(void);/* IO mapping function */ void (*init_early)(void); void (*init_irq)(void); struct sys_timer *timer; /* system tick timer */ void (*init_time)(void); void (*init_machine)(void); void (*init_late)(void); #ifdef CONFIG_MULTI_IRQ_HANDLER Loading
arch/arm/include/asm/mach/time.h +0 −30 Original line number Diff line number Diff line Loading @@ -10,36 +10,6 @@ #ifndef __ASM_ARM_MACH_TIME_H #define __ASM_ARM_MACH_TIME_H /* * This is our kernel timer structure. * * - init * Initialise the kernels jiffy timer source, claim interrupt * using setup_irq. This is called early on during initialisation * while interrupts are still disabled on the local CPU. * - suspend * Suspend the kernel jiffy timer source, if necessary. This * is called with interrupts disabled, after all normal devices * have been suspended. If no action is required, set this to * NULL. * - resume * Resume the kernel jiffy timer source, if necessary. This * is called with interrupts disabled before any normal devices * are resumed. If no action is required, set this to NULL. * - offset * Return the timer offset in microseconds since the last timer * interrupt. Note: this must take account of any unprocessed * timer interrupt which may be pending. */ struct sys_timer { void (*init)(void); void (*suspend)(void); void (*resume)(void); #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET unsigned long (*offset)(void); #endif }; extern void timer_tick(void); struct timespec; Loading
arch/arm/kernel/time.c +1 −52 Original line number Diff line number Diff line Loading @@ -21,7 +21,6 @@ #include <linux/timex.h> #include <linux/errno.h> #include <linux/profile.h> #include <linux/syscore_ops.h> #include <linux/timer.h> #include <linux/irq.h> Loading @@ -31,11 +30,6 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> /* * Our system timer. */ static struct sys_timer *system_timer; #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) /* this needs a better home */ Loading Loading @@ -69,16 +63,6 @@ unsigned long profile_pc(struct pt_regs *regs) EXPORT_SYMBOL(profile_pc); #endif #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET u32 arch_gettimeoffset(void) { if (system_timer->offset != NULL) return system_timer->offset() * 1000; return 0; } #endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */ #ifndef CONFIG_GENERIC_CLOCKEVENTS /* * Kernel system timer support. Loading Loading @@ -129,43 +113,8 @@ int __init register_persistent_clock(clock_access_fn read_boot, return -EINVAL; } #if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS) static int timer_suspend(void) { if (system_timer->suspend) system_timer->suspend(); return 0; } static void timer_resume(void) { if (system_timer->resume) system_timer->resume(); } #else #define timer_suspend NULL #define timer_resume NULL #endif static struct syscore_ops timer_syscore_ops = { .suspend = timer_suspend, .resume = timer_resume, }; static int __init timer_init_syscore_ops(void) { register_syscore_ops(&timer_syscore_ops); return 0; } device_initcall(timer_init_syscore_ops); void __init time_init(void) { system_timer = machine_desc->timer; system_timer->init(); machine_desc->init_time(); sched_clock_postinit(); }
arch/arm/mach-at91/at91rm9200_time.c +0 −5 Original line number Diff line number Diff line Loading @@ -274,8 +274,3 @@ void __init at91rm9200_timer_init(void) /* register clocksource */ clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); } struct sys_timer at91rm9200_timer = { .init = at91rm9200_timer_init, };
arch/arm/mach-at91/at91sam926x_time.c +27 −26 Original line number Diff line number Diff line Loading @@ -104,12 +104,38 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) } } static void at91sam926x_pit_suspend(struct clock_event_device *cedev) { /* Disable timer */ pit_write(AT91_PIT_MR, 0); } static void at91sam926x_pit_reset(void) { /* Disable timer and irqs */ pit_write(AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); } static void at91sam926x_pit_resume(struct clock_event_device *cedev) { at91sam926x_pit_reset(); } static struct clock_event_device pit_clkevt = { .name = "pit", .features = CLOCK_EVT_FEAT_PERIODIC, .shift = 32, .rating = 100, .set_mode = pit_clkevt_mode, .suspend = at91sam926x_pit_suspend, .resume = at91sam926x_pit_resume, }; Loading Loading @@ -150,19 +176,6 @@ static struct irqaction at91sam926x_pit_irq = { .irq = NR_IRQS_LEGACY + AT91_ID_SYS, }; static void at91sam926x_pit_reset(void) { /* Disable timer and irqs */ pit_write(AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); } #ifdef CONFIG_OF static struct of_device_id pit_timer_ids[] = { { .compatible = "atmel,at91sam9260-pit" }, Loading Loading @@ -211,7 +224,7 @@ static int __init of_at91sam926x_pit_init(void) /* * Set up both clocksource and clockevent support. */ static void __init at91sam926x_pit_init(void) void __init at91sam926x_pit_init(void) { unsigned long pit_rate; unsigned bits; Loading Loading @@ -250,12 +263,6 @@ static void __init at91sam926x_pit_init(void) clockevents_register_device(&pit_clkevt); } static void at91sam926x_pit_suspend(void) { /* Disable timer */ pit_write(AT91_PIT_MR, 0); } void __init at91sam926x_ioremap_pit(u32 addr) { #if defined(CONFIG_OF) Loading @@ -272,9 +279,3 @@ void __init at91sam926x_ioremap_pit(u32 addr) if (!pit_base_addr) panic("Impossible to ioremap PIT\n"); } struct sys_timer at91sam926x_timer = { .init = at91sam926x_pit_init, .suspend = at91sam926x_pit_suspend, .resume = at91sam926x_pit_reset, };