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Commit 71b37071 authored by Jon Hunter's avatar Jon Hunter Committed by Paul Walmsley
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ARM: OMAP4: clock data: lock USB DPLL on boot 



Some versions of the u-boot bootloader do not lock the USB DPLL and
when the USB DPLL is not locked, then it is observed that the L3INIT
power domain does not transition to retention state during kernel
suspend on OMAP4 devices. Fix this by locking the USB DPLL at 960 MHz
on kernel boot.

Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 13872ebb

arch/arm/mach-omap2/cclock44xx_data.c

+15 −0
Original line number Diff line number Diff line
@@ -52,6 +52,13 @@ 
 */

#define OMAP4_DPLL_ABE_DEFFREQ				98304000



/*

 * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section

 * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred

 * locked frequency for the USB DPLL is 960MHz.

 */

#define OMAP4_DPLL_USB_DEFFREQ				960000000



/* Root clocks */



DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1705,5 +1712,13 @@ int __init omap4xxx_clk_init(void) 
	if (rc)

		pr_err("%s: failed to configure ABE DPLL!\n", __func__);



	/*

	 * Lock USB DPLL on OMAP4 devices so that the L3INIT power

	 * domain can transition to retention state when not in use.

	 */

	rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);

	if (rc)

		pr_err("%s: failed to configure USB DPLL!\n", __func__);



	return 0;

}