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Commit 71ae7af4 authored by Charan Teja Reddy's avatar Charan Teja Reddy
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ARM: dts: msm: correct the dcc sram size on msmtitanium 



Correct the size of the SRAM of DCC which is used to dump the data read
on the AHB bus.

Change-Id: Ie706ffe35909541aa048623ee885415b31cc91dd
Signed-off-by: default avatarCharan Teja Reddy <charante@codeaurora.org>
parent 642ad5a9

arch/arm/boot/dts/qcom/msmtitanium.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -685,7 +685,7 @@ 
	dcc: dcc@b3000 {

		compatible = "qcom,dcc";

		reg = <0xb3000 0x1000>,

		      <0xb4000 0x2000>;

		      <0xb4000 0x800>;

		reg-names = "dcc-base", "dcc-ram-base";



		clocks = <&clock_gcc clk_gcc_dcc_clk>;