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Commit 713c0515 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
  arch/parisc/kernel/perf_asm.S: build fix
  parisc: remove -traditional from assembler flags
  parisc: use conditional macro for 64-bit wide ops
  parisc: Remove ioctl.h content picked up from <asm-generic/ioctl.h>.
  arch/parisc/kernel/unaligned.c: use time_* macros
  parisc: remove redundant display of free swap space in show_mem()
  drivers/parisc: replace remaining __FUNCTION__ occurrences
  parisc: replace remaining __FUNCTION__ occurrences
  parisc: new termios definitions
  parisc: fix trivial section name warnings
parents 8f40f672 c913f94d

arch/parisc/hpux/gate.S

+2 −1
Original line number Diff line number Diff line
@@ -13,9 +13,10 @@ 
#include <asm/unistd.h>

#include <asm/errno.h>

#include <linux/linkage.h>

#include <linux/init.h>



	.level	LEVEL

	.text

	__HEAD



	.import hpux_call_table

	.import hpux_syscall_exit,code

arch/parisc/hpux/wrappers.S

+2 −1
Original line number Diff line number Diff line
@@ -28,9 +28,10 @@ 
#include <asm/assembly.h>

#include <asm/signal.h>

#include <linux/linkage.h>

#include <linux/init.h>



	.level	LEVEL

	.text

	__HEAD



	/* These should probably go in a header file somewhere.

	 * They are duplicated in kernel/wrappers.S

arch/parisc/kernel/Makefile

+0 −3
Original line number Diff line number Diff line
@@ -4,9 +4,6 @@ 


extra-y			:= init_task.o head.o vmlinux.lds



AFLAGS_entry.o	:= -traditional

AFLAGS_pacache.o := -traditional



obj-y	     	:= cache.o pacache.o setup.o traps.o time.o irq.o \

		   pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \

		   ptrace.o hardware.o inventory.o drivers.o \

arch/parisc/kernel/entry.S

+21 −28
Original line number Diff line number Diff line
@@ -38,18 +38,11 @@ 
#include <asm/thread_info.h>



#include <linux/linkage.h>

#include <linux/init.h>



#ifdef CONFIG_64BIT

#define CMPIB           cmpib,*

#define CMPB            cmpb,*

#define COND(x)		*x



	.level 2.0w

#else

#define CMPIB           cmpib,

#define CMPB            cmpb,

#define COND(x)		x



	.level 2.0

#endif
@@ -629,7 +622,7 @@ 
	 * the static part of the kernel address space.

	 */



	.text

	__HEAD



	.align	PAGE_SIZE
@@ -957,9 +950,9 @@ intr_check_sig: 
	 * Only do signals if we are returning to user space

	 */

	LDREG	PT_IASQ0(%r16), %r20

	CMPIB=,n 0,%r20,intr_restore /* backward */

	cmpib,COND(=),n 0,%r20,intr_restore /* backward */

	LDREG	PT_IASQ1(%r16), %r20

	CMPIB=,n 0,%r20,intr_restore /* backward */

	cmpib,COND(=),n 0,%r20,intr_restore /* backward */



	copy	%r0, %r25			/* long in_syscall = 0 */

#ifdef CONFIG_64BIT
@@ -1013,10 +1006,10 @@ intr_do_resched: 
	 * we jump back to intr_restore.

	 */

	LDREG	PT_IASQ0(%r16), %r20

	CMPIB=	0, %r20, intr_do_preempt

	cmpib,COND(=)	0, %r20, intr_do_preempt

	nop

	LDREG	PT_IASQ1(%r16), %r20

	CMPIB=	0, %r20, intr_do_preempt

	cmpib,COND(=)	0, %r20, intr_do_preempt

	nop



#ifdef CONFIG_64BIT
@@ -1045,7 +1038,7 @@ intr_do_preempt: 
	/* current_thread_info()->preempt_count */

	mfctl	%cr30, %r1

	LDREG	TI_PRE_COUNT(%r1), %r19

	CMPIB<>	0, %r19, intr_restore	/* if preempt_count > 0 */

	cmpib,COND(<>)	0, %r19, intr_restore	/* if preempt_count > 0 */

	nop				/* prev insn branched backwards */



	/* check if we interrupted a critical path */
@@ -1064,7 +1057,7 @@ intr_do_preempt: 
	 */



intr_extint:

	CMPIB=,n 0,%r16,1f

	cmpib,COND(=),n 0,%r16,1f



	get_stack_use_cr30

	b,n 2f
@@ -1099,7 +1092,7 @@ ENDPROC(syscall_exit_rfi) 


ENTRY(intr_save)		/* for os_hpmc */

	mfsp    %sr7,%r16

	CMPIB=,n 0,%r16,1f

	cmpib,COND(=),n 0,%r16,1f

	get_stack_use_cr30

	b	2f

	copy    %r8,%r26
@@ -1121,7 +1114,7 @@ ENTRY(intr_save) /* for os_hpmc */ 
	 *           adjust isr/ior below.

	 */



	CMPIB=,n        6,%r26,skip_save_ior

	cmpib,COND(=),n        6,%r26,skip_save_ior





	mfctl           %cr20, %r16 /* isr */
@@ -1450,11 +1443,11 @@ nadtlb_emulate: 
	bb,>=,n         %r9,26,nadtlb_nullify  /* m bit not set, just nullify */

	BL		get_register,%r25

	extrw,u         %r9,15,5,%r8           /* Get index register # */

	CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */

	cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */

	copy            %r1,%r24

	BL		get_register,%r25

	extrw,u         %r9,10,5,%r8           /* Get base register # */

	CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */

	cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */

	BL		set_register,%r25

	add,l           %r1,%r24,%r1           /* doesn't affect c/b bits */
@@ -1486,7 +1479,7 @@ nadtlb_probe_check: 
	cmpb,<>,n       %r16,%r17,nadtlb_fault /* Must be probe,[rw]*/

	BL              get_register,%r25      /* Find the target register */

	extrw,u         %r9,31,5,%r8           /* Get target register */

	CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */

	cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */

	BL		set_register,%r25

	copy            %r0,%r1                /* Write zero to target register */

	b nadtlb_nullify                       /* Nullify return insn */
@@ -1570,12 +1563,12 @@ dbit_trap_20w: 
	L3_ptep		ptp,pte,t0,va,dbit_fault



#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nolock_20w

	cmpib,COND(=),n        0,spc,dbit_nolock_20w

	load32		PA(pa_dbit_lock),t0



dbit_spin_20w:

	LDCW		0(t0),t1

	cmpib,=         0,t1,dbit_spin_20w

	cmpib,COND(=)         0,t1,dbit_spin_20w

	nop



dbit_nolock_20w:
@@ -1586,7 +1579,7 @@ dbit_nolock_20w: 
		

	idtlbt          pte,prot

#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nounlock_20w

	cmpib,COND(=),n        0,spc,dbit_nounlock_20w

	ldi             1,t1

	stw             t1,0(t0)
@@ -1606,7 +1599,7 @@ dbit_trap_11: 
	L2_ptep		ptp,pte,t0,va,dbit_fault



#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nolock_11

	cmpib,COND(=),n        0,spc,dbit_nolock_11

	load32		PA(pa_dbit_lock),t0



dbit_spin_11:
@@ -1628,7 +1621,7 @@ dbit_nolock_11: 


	mtsp            t1, %sr1     /* Restore sr1 */

#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nounlock_11

	cmpib,COND(=),n        0,spc,dbit_nounlock_11

	ldi             1,t1

	stw             t1,0(t0)
@@ -1646,7 +1639,7 @@ dbit_trap_20: 
	L2_ptep		ptp,pte,t0,va,dbit_fault



#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nolock_20

	cmpib,COND(=),n        0,spc,dbit_nolock_20

	load32		PA(pa_dbit_lock),t0



dbit_spin_20:
@@ -1665,7 +1658,7 @@ dbit_nolock_20: 
        idtlbt          pte,prot



#ifdef CONFIG_SMP

	CMPIB=,n        0,spc,dbit_nounlock_20

	cmpib,COND(=),n        0,spc,dbit_nounlock_20

	ldi             1,t1

	stw             t1,0(t0)
@@ -1994,7 +1987,7 @@ ENTRY(syscall_exit) 


	/* We can't use "CMPIB<> PER_HPUX" since "im5" field is sign extended */

	ldo	  -PER_HPUX(%r19), %r19

	CMPIB<>,n 0,%r19,1f

	cmpib,COND(<>),n 0,%r19,1f



	/* Save other hpux returns if personality is PER_HPUX */

	STREG     %r22,TASK_PT_GR22(%r1)

arch/parisc/kernel/head.S

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ ENTRY(boot_args) 
	.word 0 /* arg3 */

END(boot_args)



	.section .text.head

	__HEAD

	.align	4

	.import init_thread_union,data

	.import fault_vector_20,code    /* IVA parisc 2.0 32 bit */