Loading drivers/platform/msm/mhi_dev/mhi.c +29 −19 Original line number Diff line number Diff line Loading @@ -34,13 +34,10 @@ #include "mhi_sm.h" /* Wait time on the device for Host to set M0 state */ #define MHI_M0_WAIT_MIN_USLEEP 20000000 #define MHI_M0_WAIT_MAX_USLEEP 25000000 #define MHI_DEV_M0_MAX_CNT 30 /* Wait time before suspend/resume is complete */ #define MHI_SUSPEND_WAIT_MIN 3100 #define MHI_SUSPEND_WAIT_MAX 3200 #define MHI_SUSPEND_WAIT_TIMEOUT 500 #define MHI_SUSPEND_MIN 10000 #define MHI_SUSPEND_TIMEOUT 3000 #define MHI_MASK_CH_EV_LEN 32 #define MHI_RING_CMD_ID 0 #define MHI_RING_PRIMARY_EVT_ID 1 Loading Loading @@ -512,8 +509,7 @@ int mhi_dev_send_event(struct mhi_dev *mhi, int evnt_ring, struct mhi_addr transfer_addr; uint32_t data_buffer = 0; rc = ep_pcie_get_msi_config(mhi->phandle, &cfg); rc = ep_pcie_get_msi_config(mhi->phandle, &cfg); if (rc) { pr_err("Error retrieving pcie msi logic\n"); return rc; Loading Loading @@ -1728,9 +1724,9 @@ int mhi_dev_write_channel(struct mhi_dev_client *handle_client, atomic_inc(&mhi_ctx->write_active); while (atomic_read(&mhi_ctx->is_suspended) && suspend_wait_timeout < MHI_SUSPEND_WAIT_TIMEOUT) { suspend_wait_timeout < MHI_SUSPEND_TIMEOUT) { /* wait for the suspend to finish */ usleep_range(MHI_SUSPEND_WAIT_MIN, MHI_SUSPEND_WAIT_MAX); msleep(MHI_SUSPEND_MIN); suspend_wait_timeout++; } Loading Loading @@ -1827,7 +1823,7 @@ static void mhi_dev_enable(struct work_struct *work) struct mhi_dev, ring_init_cb_work); enum mhi_dev_state state; uint32_t max_cnt = 0; uint32_t max_cnt = 0, bhi_intvec = 0; if (mhi->use_ipa) { Loading Loading @@ -1856,9 +1852,24 @@ static void mhi_dev_enable(struct work_struct *work) if (rc) pr_err("%s Failed to initialize mhi_dev_net iface\n", __func__); rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg); rc = mhi_dev_mmio_read(mhi, BHI_INTVEC, &bhi_intvec); if (rc) pr_warn("MHI: error geting msi configs\n"); return rc; if (bhi_intvec != 0xffffffff) { /* Indicate the host that the device is ready */ rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg); if (rc) { pr_err("MHI: error geting msi configs\n"); return; } rc = ep_pcie_trigger_msi(mhi_ctx->phandle, bhi_intvec); if (rc) { pr_err("%s: error sending msi\n", __func__); return; } } rc = mhi_dev_mmio_get_mhi_state(mhi, &state); if (rc) { Loading @@ -1866,9 +1877,9 @@ static void mhi_dev_enable(struct work_struct *work) return; } while (state != MHI_DEV_M0_STATE && max_cnt < MHI_DEV_M0_MAX_CNT) { while (state != MHI_DEV_M0_STATE && max_cnt < MHI_SUSPEND_TIMEOUT) { /* Wait for Host to set the M0 state */ usleep_range(MHI_M0_WAIT_MIN_USLEEP, MHI_M0_WAIT_MAX_USLEEP); msleep(MHI_SUSPEND_MIN); rc = mhi_dev_mmio_get_mhi_state(mhi, &state); if (rc) { pr_err("%s: get mhi state failed\n", __func__); Loading Loading @@ -2033,7 +2044,6 @@ static int mhi_init(struct mhi_dev *mhi) return rc; } mhi->ring = devm_kzalloc(&pdev->dev, (sizeof(struct mhi_dev_ring) * (mhi->cfg.channels + mhi->cfg.event_rings + 1)), Loading drivers/platform/msm/mhi_dev/mhi_hwio.h +5 −1 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015, 2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -184,6 +184,10 @@ #define ERDB_HIGHER_n_ERDB_HIGHER_MASK 0xffffffff #define ERDB_HIGHER_n_ERDB_HIGHER_SHIFT 0x0 #define BHI_INTVEC (0x220) #define BHI_INTVEC_MASK 0xFFFFFFFF #define BHI_INTVEC_SHIFT 0 #define BHI_EXECENV (0x228) #define BHI_EXECENV_MASK 0xFFFFFFFF #define BHI_EXECENV_SHIFT 0 Loading Loading
drivers/platform/msm/mhi_dev/mhi.c +29 −19 Original line number Diff line number Diff line Loading @@ -34,13 +34,10 @@ #include "mhi_sm.h" /* Wait time on the device for Host to set M0 state */ #define MHI_M0_WAIT_MIN_USLEEP 20000000 #define MHI_M0_WAIT_MAX_USLEEP 25000000 #define MHI_DEV_M0_MAX_CNT 30 /* Wait time before suspend/resume is complete */ #define MHI_SUSPEND_WAIT_MIN 3100 #define MHI_SUSPEND_WAIT_MAX 3200 #define MHI_SUSPEND_WAIT_TIMEOUT 500 #define MHI_SUSPEND_MIN 10000 #define MHI_SUSPEND_TIMEOUT 3000 #define MHI_MASK_CH_EV_LEN 32 #define MHI_RING_CMD_ID 0 #define MHI_RING_PRIMARY_EVT_ID 1 Loading Loading @@ -512,8 +509,7 @@ int mhi_dev_send_event(struct mhi_dev *mhi, int evnt_ring, struct mhi_addr transfer_addr; uint32_t data_buffer = 0; rc = ep_pcie_get_msi_config(mhi->phandle, &cfg); rc = ep_pcie_get_msi_config(mhi->phandle, &cfg); if (rc) { pr_err("Error retrieving pcie msi logic\n"); return rc; Loading Loading @@ -1728,9 +1724,9 @@ int mhi_dev_write_channel(struct mhi_dev_client *handle_client, atomic_inc(&mhi_ctx->write_active); while (atomic_read(&mhi_ctx->is_suspended) && suspend_wait_timeout < MHI_SUSPEND_WAIT_TIMEOUT) { suspend_wait_timeout < MHI_SUSPEND_TIMEOUT) { /* wait for the suspend to finish */ usleep_range(MHI_SUSPEND_WAIT_MIN, MHI_SUSPEND_WAIT_MAX); msleep(MHI_SUSPEND_MIN); suspend_wait_timeout++; } Loading Loading @@ -1827,7 +1823,7 @@ static void mhi_dev_enable(struct work_struct *work) struct mhi_dev, ring_init_cb_work); enum mhi_dev_state state; uint32_t max_cnt = 0; uint32_t max_cnt = 0, bhi_intvec = 0; if (mhi->use_ipa) { Loading Loading @@ -1856,9 +1852,24 @@ static void mhi_dev_enable(struct work_struct *work) if (rc) pr_err("%s Failed to initialize mhi_dev_net iface\n", __func__); rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg); rc = mhi_dev_mmio_read(mhi, BHI_INTVEC, &bhi_intvec); if (rc) pr_warn("MHI: error geting msi configs\n"); return rc; if (bhi_intvec != 0xffffffff) { /* Indicate the host that the device is ready */ rc = ep_pcie_get_msi_config(mhi->phandle, &msi_cfg); if (rc) { pr_err("MHI: error geting msi configs\n"); return; } rc = ep_pcie_trigger_msi(mhi_ctx->phandle, bhi_intvec); if (rc) { pr_err("%s: error sending msi\n", __func__); return; } } rc = mhi_dev_mmio_get_mhi_state(mhi, &state); if (rc) { Loading @@ -1866,9 +1877,9 @@ static void mhi_dev_enable(struct work_struct *work) return; } while (state != MHI_DEV_M0_STATE && max_cnt < MHI_DEV_M0_MAX_CNT) { while (state != MHI_DEV_M0_STATE && max_cnt < MHI_SUSPEND_TIMEOUT) { /* Wait for Host to set the M0 state */ usleep_range(MHI_M0_WAIT_MIN_USLEEP, MHI_M0_WAIT_MAX_USLEEP); msleep(MHI_SUSPEND_MIN); rc = mhi_dev_mmio_get_mhi_state(mhi, &state); if (rc) { pr_err("%s: get mhi state failed\n", __func__); Loading Loading @@ -2033,7 +2044,6 @@ static int mhi_init(struct mhi_dev *mhi) return rc; } mhi->ring = devm_kzalloc(&pdev->dev, (sizeof(struct mhi_dev_ring) * (mhi->cfg.channels + mhi->cfg.event_rings + 1)), Loading
drivers/platform/msm/mhi_dev/mhi_hwio.h +5 −1 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015, 2017 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -184,6 +184,10 @@ #define ERDB_HIGHER_n_ERDB_HIGHER_MASK 0xffffffff #define ERDB_HIGHER_n_ERDB_HIGHER_SHIFT 0x0 #define BHI_INTVEC (0x220) #define BHI_INTVEC_MASK 0xFFFFFFFF #define BHI_INTVEC_SHIFT 0 #define BHI_EXECENV (0x228) #define BHI_EXECENV_MASK 0xFFFFFFFF #define BHI_EXECENV_SHIFT 0 Loading