Loading arch/arm/boot/dts/qcom/msm8996-camera.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a35000 { Loading @@ -60,7 +60,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a36000 { Loading @@ -81,7 +81,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csid@a30000 { Loading Loading
arch/arm/boot/dts/qcom/msm8996-camera.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a35000 { Loading @@ -60,7 +60,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csiphy@a36000 { Loading @@ -81,7 +81,7 @@ "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk", "csiphy_3p_clk_src", "csi_phy_3p_clk"; qcom,clock-rates = <0 0 266670000 0 0 200000000 0>; qcom,clock-rates = <0 0 200000000 0 0 100000000 0>; }; qcom,csid@a30000 { Loading