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Commit 707d9cf9 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: gen specific ring init 



Gen8 has already had some differentiation with how it handles rings.
Semaphores bring yet more differences, and now is as good a time as any
to do the split.

Also, since gen8 doesn't actually use semaphores up until this point,
put the proper "NULL" values in for the mbox info.

v2: v1 had a stale commit message

v3: Move everything in the is_semaphore_enabled() check

v4: VCS2 rebase
Remove double assignment of signal in render ring (Ville)

v5: Adding missed VCS2 signal init on gen8+ (Rodrigo)

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ddd4dbc6

drivers/gpu/drm/i915/intel_ringbuffer.c

+151 −76
Original line number Original line Diff line number Diff line
@@ -729,7 +729,11 @@ gen6_add_request(struct intel_engine_cs *ring) 
{

{

	int ret;

	int ret;





	if (ring->semaphore.signal)

		ret = ring->semaphore.signal(ring, 4);

		ret = ring->semaphore.signal(ring, 4);

	else

		ret = intel_ring_begin(ring, 4);



	if (ret)

	if (ret)

		return ret;

		return ret;
@@ -1952,29 +1956,47 @@ int intel_init_render_ring_buffer(struct drm_device *dev) 
	ring->id = RCS;

	ring->id = RCS;

	ring->mmio_base = RENDER_RING_BASE;

	ring->mmio_base = RENDER_RING_BASE;





	if (INTEL_INFO(dev)->gen >= 6) {

		ring->add_request = gen6_add_request;

		ring->flush = gen7_render_ring_flush;

		if (INTEL_INFO(dev)->gen == 6)

			ring->flush = gen6_render_ring_flush;

	if (INTEL_INFO(dev)->gen >= 8) {

	if (INTEL_INFO(dev)->gen >= 8) {

		ring->add_request = gen6_add_request;

		ring->flush = gen8_render_ring_flush;

		ring->flush = gen8_render_ring_flush;

		ring->irq_get = gen8_ring_get_irq;

		ring->irq_get = gen8_ring_get_irq;

		ring->irq_put = gen8_ring_put_irq;

		ring->irq_put = gen8_ring_put_irq;

		} else {

		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;

		ring->get_seqno = gen6_ring_get_seqno;

		ring->set_seqno = ring_set_seqno;

		if (i915_semaphore_is_enabled(dev)) {

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS2] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	} else if (INTEL_INFO(dev)->gen >= 6) {

		ring->add_request = gen6_add_request;

		ring->flush = gen7_render_ring_flush;

		if (INTEL_INFO(dev)->gen == 6)

			ring->flush = gen6_render_ring_flush;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_put = gen6_ring_put_irq;

		ring->irq_put = gen6_ring_put_irq;

		}

		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;

		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;

		ring->get_seqno = gen6_ring_get_seqno;

		ring->get_seqno = gen6_ring_get_seqno;

		ring->set_seqno = ring_set_seqno;

		ring->set_seqno = ring_set_seqno;

		if (i915_semaphore_is_enabled(dev)) {

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.signal = gen6_signal;

			/*

			/*

		 * The current semaphore is only applied on pre-gen8 platform.

			 * The current semaphore is only applied on pre-gen8

		 * And there is no VCS2 ring on the pre-gen8 platform. So the

			 * platform.  And there is no VCS2 ring on the pre-gen8

		 * semaphore between RCS and VCS2 is initialized as INVALID.

			 * platform. So the semaphore between RCS and VCS2 is

		 * Gen8 will initialize the sema between VCS2 and RCS later.

			 * initialized as INVALID.  Gen8 will initialize the

			 * sema between VCS2 and RCS later.

			 */

			 */

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_RV;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_RV;
@@ -1986,6 +2008,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) 
			ring->semaphore.mbox.signal[BCS] = GEN6_BRSYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_BRSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_VERSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_VERSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	} else if (IS_GEN5(dev)) {

	} else if (IS_GEN5(dev)) {

		ring->add_request = pc_render_add_request;

		ring->add_request = pc_render_add_request;

		ring->flush = gen4_render_ring_flush;

		ring->flush = gen4_render_ring_flush;
@@ -2013,6 +2036,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev) 
		ring->irq_enable_mask = I915_USER_INTERRUPT;

		ring->irq_enable_mask = I915_USER_INTERRUPT;

	}

	}

	ring->write_tail = ring_write_tail;

	ring->write_tail = ring_write_tail;



	if (IS_HASWELL(dev))

	if (IS_HASWELL(dev))

		ring->dispatch_execbuffer = hsw_ring_dispatch_execbuffer;

		ring->dispatch_execbuffer = hsw_ring_dispatch_execbuffer;

	else if (IS_GEN8(dev))

	else if (IS_GEN8(dev))
@@ -2163,21 +2187,37 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) 
			ring->irq_put = gen8_ring_put_irq;

			ring->irq_put = gen8_ring_put_irq;

			ring->dispatch_execbuffer =

			ring->dispatch_execbuffer =

				gen8_ring_dispatch_execbuffer;

				gen8_ring_dispatch_execbuffer;

			if (i915_semaphore_is_enabled(dev)) {

				ring->semaphore.sync_to = gen6_ring_sync;

				ring->semaphore.signal = gen6_signal;

				/*

				 * The current semaphore is only applied on

				 * pre-gen8 platform.  And there is no VCS2 ring

				 * on the pre-gen8 platform. So the semaphore

				 * between VCS and VCS2 is initialized as

				 * INVALID.  Gen8 will initialize the sema

				 * between VCS2 and VCS later.

				 */

				ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[VCS2] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC;

				ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC;

				ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

				ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

				ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

			}

		} else {

		} else {

			ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;

			ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;

			ring->irq_get = gen6_ring_get_irq;

			ring->irq_get = gen6_ring_get_irq;

			ring->irq_put = gen6_ring_put_irq;

			ring->irq_put = gen6_ring_put_irq;

			ring->dispatch_execbuffer =

			ring->dispatch_execbuffer =

				gen6_ring_dispatch_execbuffer;

				gen6_ring_dispatch_execbuffer;

		}

			if (i915_semaphore_is_enabled(dev)) {

				ring->semaphore.sync_to = gen6_ring_sync;

				ring->semaphore.sync_to = gen6_ring_sync;

				ring->semaphore.signal = gen6_signal;

				ring->semaphore.signal = gen6_signal;

		/*

		 * The current semaphore is only applied on pre-gen8 platform.

		 * And there is no VCS2 ring on the pre-gen8 platform. So the

		 * semaphore between VCS and VCS2 is initialized as INVALID.

		 * Gen8 will initialize the sema between VCS2 and VCS later.

		 */

				ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR;

				ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VR;

				ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

				ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VB;

				ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_VB;
@@ -2188,6 +2228,8 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) 
				ring->semaphore.mbox.signal[BCS] = GEN6_BVSYNC;

				ring->semaphore.mbox.signal[BCS] = GEN6_BVSYNC;

				ring->semaphore.mbox.signal[VECS] = GEN6_VEVSYNC;

				ring->semaphore.mbox.signal[VECS] = GEN6_VEVSYNC;

				ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

				ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

			}

		}

	} else {

	} else {

		ring->mmio_base = BSD_RING_BASE;

		ring->mmio_base = BSD_RING_BASE;

		ring->flush = bsd_ring_flush;

		ring->flush = bsd_ring_flush;
@@ -2283,19 +2325,34 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) 
		ring->irq_get = gen8_ring_get_irq;

		ring->irq_get = gen8_ring_get_irq;

		ring->irq_put = gen8_ring_put_irq;

		ring->irq_put = gen8_ring_put_irq;

		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;

		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;

		if (i915_semaphore_is_enabled(dev)) {

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS2] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	} else {

	} else {

		ring->irq_enable_mask = GT_BLT_USER_INTERRUPT;

		ring->irq_enable_mask = GT_BLT_USER_INTERRUPT;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_get = gen6_ring_get_irq;

		ring->irq_put = gen6_ring_put_irq;

		ring->irq_put = gen6_ring_put_irq;

		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;

		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;

	}

		if (i915_semaphore_is_enabled(dev)) {

	ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.sync_to = gen6_ring_sync;

			/*

			/*

	 * The current semaphore is only applied on pre-gen8 platform. And

			 * The current semaphore is only applied on pre-gen8

	 * there is no VCS2 ring on the pre-gen8 platform. So the semaphore

			 * platform.  And there is no VCS2 ring on the pre-gen8

	 * between BCS and VCS2 is initialized as INVALID.

			 * platform. So the semaphore between BCS and VCS2 is

	 * Gen8 will initialize the sema between BCS and VCS2 later.

			 * initialized as INVALID.  Gen8 will initialize the

			 * sema between BCS and VCS2 later.

			 */

			 */

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_BR;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_BR;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_BV;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_BV;
@@ -2307,6 +2364,8 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) 
			ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_VEBSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_VEBSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	}

	ring->init = init_ring_common;

	ring->init = init_ring_common;





	return intel_init_ring_buffer(dev, ring);

	return intel_init_ring_buffer(dev, ring);
@@ -2333,12 +2392,26 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) 
		ring->irq_get = gen8_ring_get_irq;

		ring->irq_get = gen8_ring_get_irq;

		ring->irq_put = gen8_ring_put_irq;

		ring->irq_put = gen8_ring_put_irq;

		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;

		ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer;

		if (i915_semaphore_is_enabled(dev)) {

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[BCS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.wait[VCS2] = MI_SEMAPHORE_SYNC_INVALID;

			ring->semaphore.mbox.signal[RCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	} else {

	} else {

		ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT;

		ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT;

		ring->irq_get = hsw_vebox_get_irq;

		ring->irq_get = hsw_vebox_get_irq;

		ring->irq_put = hsw_vebox_put_irq;

		ring->irq_put = hsw_vebox_put_irq;

		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;

		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;

	}

		if (i915_semaphore_is_enabled(dev)) {

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.sync_to = gen6_ring_sync;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.signal = gen6_signal;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER;

			ring->semaphore.mbox.wait[RCS] = MI_SEMAPHORE_SYNC_VER;
@@ -2351,6 +2424,8 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) 
			ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC;

			ring->semaphore.mbox.signal[BCS] = GEN6_BVESYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VECS] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

			ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;

		}

	}

	ring->init = init_ring_common;

	ring->init = init_ring_common;





	return intel_init_ring_buffer(dev, ring);

	return intel_init_ring_buffer(dev, ring);