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Commit 70384a6a authored by Mugunthan V N's avatar Mugunthan V N Committed by David S. Miller
Browse files

ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module 



This patch adds hwmod entry for davinci MDIO module,
creating parent<->child relationship between CPSW and MDIO module.

This Parent-child relation is required in order to use common resources
like, clock, but still maintaining the logical separation between them.

CPGMAC SubSystem consist of various sub-modules, like, mdio, cpdma,
cpsw, etc... These sub-modules are also used in some of Davinci
family of devices, so separate and independent platform devices &
drivers for CPSW and MDIO is implemented.
In case of AM33XX, the resources are shared and common register
bit-field is provided to control module/clock enable/disable,
makes it difficult to handle common resources from both drivers.

So the solution is, create parent<->child relationship between
CPGMAC & MDIO modules.

Signed-off-by: default avatarMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: default avatarVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: default avatarPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: default avatarRichard Cochran <richardcochran@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 71380f9b

arch/arm/mach-omap2/omap_hwmod_33xx_data.c

+31 −0
Original line number Diff line number Diff line
@@ -674,6 +674,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = { 
	.name		= "cpgmac0",

	.class		= &am33xx_cpgmac0_hwmod_class,

	.clkdm_name	= "cpsw_125mhz_clkdm",

	.flags		= (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),

	.mpu_irqs	= am33xx_cpgmac0_irqs,

	.main_clk	= "cpsw_125mhz_gclk",

	.prcm		= {
@@ -684,6 +685,20 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = { 
	},

};



/*

 * mdio class

 */

static struct omap_hwmod_class am33xx_mdio_hwmod_class = {

	.name		= "davinci_mdio",

};



static struct omap_hwmod am33xx_mdio_hwmod = {

	.name		= "davinci_mdio",

	.class		= &am33xx_mdio_hwmod_class,

	.clkdm_name	= "cpsw_125mhz_clkdm",

	.main_clk	= "cpsw_125mhz_gclk",

};



/*

 * dcan class

 */
@@ -2501,6 +2516,21 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = { 
	.user		= OCP_USER_MPU,

};



struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {

	{

		.pa_start	= 0x4A101000,

		.pa_end		= 0x4A101000 + SZ_256 - 1,

	},

	{ }

};



struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {

	.master		= &am33xx_cpgmac0_hwmod,

	.slave		= &am33xx_mdio_hwmod,

	.addr		= am33xx_mdio_addr_space,

	.user		= OCP_USER_MPU,

};



static struct omap_hwmod_addr_space am33xx_elm_addr_space[] = {

	{

		.pa_start	= 0x48080000,
@@ -3371,6 +3401,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { 
	&am33xx_l3_main__tptc2,

	&am33xx_l3_s__usbss,

	&am33xx_l4_hs__cpgmac0,

	&am33xx_cpgmac0__mdio,

	NULL,

};