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Commit 702df640 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

i5000_edac: convert driver to use the new edac ABI 



The legacy edac ABI is going to be removed. Port the driver to use
and benefit from the new API functionality.

Cc: Doug Thompson <norsk5@yahoo.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 95b93287

drivers/edac/i5000_edac.c

+39 −21
Original line number Diff line number Diff line
@@ -533,13 +533,14 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, 


	/* Form out message */

	snprintf(msg, sizeof(msg),

		 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d "

		 "FATAL Err=0x%x (%s))",

		 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,

		 allErrors, specific);

		 "Bank=%d RAS=%d CAS=%d FATAL Err=0x%x (%s)",

		 bank, ras, cas, allErrors, specific);



	/* Call the helper to output message */

	edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);

	edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,

			     branch >> 1, -1, rank,

			     rdwr ? "Write error" : "Read error",

			     msg, NULL);

}



/*
@@ -633,13 +634,14 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, 


		/* Form out message */

		snprintf(msg, sizeof(msg),

			 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "

			 "CAS=%d, UE Err=0x%x (%s))",

			 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,

			 ue_errors, specific);

			 "Rank=%d Bank=%d RAS=%d CAS=%d, UE Err=0x%x (%s)",

			 rank, bank, ras, cas, ue_errors, specific);



		/* Call the helper to output message */

		edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);

		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,

				channel >> 1, -1, rank,

				rdwr ? "Write error" : "Read error",

				msg, NULL);

	}



	/* Check correctable errors */
@@ -685,13 +687,16 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, 


		/* Form out message */

		snprintf(msg, sizeof(msg),

			 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "

			 "Rank=%d Bank=%d RDWR=%s RAS=%d "

			 "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank,

			 rdwr ? "Write" : "Read", ras, cas, ce_errors,

			 specific);



		/* Call the helper to output message */

		edac_mc_handle_fbd_ce(mci, rank, channel, msg);

		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,

				channel >> 1, channel % 2, rank,

				rdwr ? "Write error" : "Read error",

				msg, NULL);

	}



	if (!misc_messages)
@@ -731,11 +736,12 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, 


		/* Form out message */

		snprintf(msg, sizeof(msg),

			 "(Branch=%d Err=%#x (%s))", branch >> 1,

			 misc_errors, specific);

			 "Err=%#x (%s)", misc_errors, specific);



		/* Call the helper to output message */

		edac_mc_handle_fbd_ce(mci, 0, 0, msg);

		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,

				branch >> 1, -1, -1,

				"Misc error", msg, NULL);

	}

}
@@ -1251,6 +1257,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) 


	empty = 1;		/* Assume NO memory */



	/*

	 * TODO: it would be better to not use csrow here, filling

	 * directly the dimm_info structs, based on branch, channel, dim number

	 */

	for (csrow = 0; csrow < max_csrows; csrow++) {

		p_csrow = &mci->csrows[csrow];
@@ -1312,7 +1322,7 @@ static void i5000_enable_error_reporting(struct mem_ctl_info *mci) 
}



/*

 * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels)

 * i5000_get_dimm_and_channel_counts(pdev, &nr_csrows, &num_channels)

 *

 *	ask the device how many channels are present and how many CSROWS

 *	 as well
@@ -1343,10 +1353,10 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev, 
static int i5000_probe1(struct pci_dev *pdev, int dev_idx)

{

	struct mem_ctl_info *mci;

	struct edac_mc_layer layers[3];

	struct i5000_pvt *pvt;

	int num_channels;

	int num_dimms_per_channel;

	int num_csrows;



	debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",

		__FILE__, __func__,
@@ -1372,13 +1382,21 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx) 
	 */

	i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel,

					&num_channels);

	num_csrows = num_dimms_per_channel * 2;



	debugf0("MC: %s(): Number of - Channels= %d  DIMMS= %d  CSROWS= %d\n",

		__func__, num_channels, num_dimms_per_channel, num_csrows);

	debugf0("MC: %s(): Number of Branches=2 Channels= %d  DIMMS= %d\n",

		__func__, num_channels, num_dimms_per_channel);



	/* allocate a new MC control structure */

	mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);

	layers[0].type = EDAC_MC_LAYER_BRANCH;

	layers[0].size = 2;

	layers[0].is_virt_csrow = true;

	layers[1].type = EDAC_MC_LAYER_CHANNEL;

	layers[1].size = num_channels;

	layers[1].is_virt_csrow = false;

	layers[2].type = EDAC_MC_LAYER_SLOT;

	layers[2].size = num_dimms_per_channel;

	layers[2].is_virt_csrow = true;

	mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));



	if (mci == NULL)

		return -ENOMEM;