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Commit 6fa88045 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab
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[media] adv7604: Add endpoint properties to DT bindings



Add support for the hsync-active, vsync-active and pclk-sample
properties to the DT bindings and control BT.656 mode implicitly.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Acked-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent f82f313e
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+13 −0
Original line number Diff line number Diff line
@@ -33,6 +33,19 @@ Optional Properties:

  - reset-gpios: Reference to the GPIO connected to the device's reset pin.

Optional Endpoint Properties:

  The following three properties are defined in video-interfaces.txt and are
  valid for source endpoints only.

  - hsync-active: Horizontal synchronization polarity. Defaults to active low.
  - vsync-active: Vertical synchronization polarity. Defaults to active low.
  - pclk-sample: Pixel clock polarity. Defaults to output on the falling edge.

  If none of hsync-active, vsync-active and pclk-sample is specified the
  endpoint will use embedded BT.656 synchronization.


Example:

	hdmi_receiver@4c {
+32 −2
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-dv-timings.h>
#include <media/v4l2-of.h>

static int debug;
module_param(debug, int, 0644);
@@ -2678,6 +2679,37 @@ MODULE_DEVICE_TABLE(of, adv7604_of_id);

static int adv7604_parse_dt(struct adv7604_state *state)
{
	struct v4l2_of_endpoint bus_cfg;
	struct device_node *endpoint;
	struct device_node *np;
	unsigned int flags;

	np = state->i2c_clients[ADV7604_PAGE_IO]->dev.of_node;

	/* Parse the endpoint. */
	endpoint = of_graph_get_next_endpoint(np, NULL);
	if (!endpoint)
		return -EINVAL;

	v4l2_of_parse_endpoint(endpoint, &bus_cfg);
	of_node_put(endpoint);

	flags = bus_cfg.bus.parallel.flags;

	if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
		state->pdata.inv_hs_pol = 1;

	if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
		state->pdata.inv_vs_pol = 1;

	if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
		state->pdata.inv_llc_pol = 1;

	if (bus_cfg.bus_type == V4L2_MBUS_BT656) {
		state->pdata.insert_av_codes = 1;
		state->pdata.op_656_range = 1;
	}

	/* Disable the interrupt for now as no DT-based board uses it. */
	state->pdata.int1_config = ADV7604_INT1_CONFIG_DISABLED;

@@ -2700,9 +2732,7 @@ static int adv7604_parse_dt(struct adv7604_state *state)
	state->pdata.disable_cable_det_rst = 0;
	state->pdata.default_input = -1;
	state->pdata.blank_data = 1;
	state->pdata.op_656_range = 1;
	state->pdata.alt_data_sat = 1;
	state->pdata.insert_av_codes = 1;
	state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0;
	state->pdata.bus_order = ADV7604_BUS_ORDER_RGB;