Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6fa85e5c authored by Stepan Moskovchenko's avatar Stepan Moskovchenko Committed by Russell King
Browse files

ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode 



Use the correct I/O address definitions for Footbridge
peripherals when the kernel is compiled without MMU
support.

Signed-off-by: default avatarStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent bf9dd360

arch/arm/mach-footbridge/include/mach/hardware.h

+14 −7
Original line number Diff line number Diff line
@@ -23,26 +23,33 @@ 
 * 0xf9000000	0x50000000	1MB	Cache flush

 * 0xf0000000	0x80000000	16MB	ISA memory

 */



#ifdef CONFIG_MMU

#define MMU_IO(a, b)	(a)

#else

#define MMU_IO(a, b)	(b)

#endif



#define XBUS_SIZE		0x00100000

#define XBUS_BASE		0xff800000

#define XBUS_BASE		MMU_IO(0xff800000, 0x40000000)



#define ARMCSR_SIZE		0x00100000

#define ARMCSR_BASE		0xfe000000

#define ARMCSR_BASE		MMU_IO(0xfe000000, 0x42000000)



#define WFLUSH_SIZE		0x00100000

#define WFLUSH_BASE		0xfd000000

#define WFLUSH_BASE		MMU_IO(0xfd000000, 0x78000000)



#define PCIIACK_SIZE		0x00100000

#define PCIIACK_BASE		0xfc000000

#define PCIIACK_BASE		MMU_IO(0xfc000000, 0x79000000)



#define PCICFG1_SIZE		0x01000000

#define PCICFG1_BASE		0xfb000000

#define PCICFG1_BASE		MMU_IO(0xfb000000, 0x7a000000)



#define PCICFG0_SIZE		0x01000000

#define PCICFG0_BASE		0xfa000000

#define PCICFG0_BASE		MMU_IO(0xfa000000, 0x7b000000)



#define PCIMEM_SIZE		0x01000000

#define PCIMEM_BASE		0xf0000000

#define PCIMEM_BASE		MMU_IO(0xf0000000, 0x80000000)



#define XBUS_LEDS		((volatile unsigned char *)(XBUS_BASE + 0x12000))

#define XBUS_LED_AMBER		(1 << 0)

arch/arm/mach-footbridge/include/mach/io.h

+8 −2
Original line number Diff line number Diff line
@@ -14,8 +14,14 @@ 
#ifndef __ASM_ARM_ARCH_IO_H

#define __ASM_ARM_ARCH_IO_H



#ifdef CONFIG_MMU

#define MMU_IO(a, b)	(a)

#else

#define MMU_IO(a, b)	(b)

#endif



#define PCIO_SIZE       0x00100000

#define PCIO_BASE		0xff000000

#define PCIO_BASE       MMU_IO(0xff000000, 0x7c000000)



#define IO_SPACE_LIMIT 0xffff